S9S12P96J0MFT Freescale Semiconductor, S9S12P96J0MFT Datasheet - Page 22
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S9S12P96J0MFT
Manufacturer Part Number
S9S12P96J0MFT
Description
MCU 96K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of S9S12P96J0MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 22 of 566
- Download datasheet (8Mb)
Device Overview MC9S12P-Family
1.3.12
1.3.13
1.3.14
1.3.15
22
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Programmable character length
Programmable polarity for transmitter and receiver
Active edge receive wakeup
Break detect and transmit collision detect supporting LIN
Configurable 8- or 16-bit data size
Full-duplex or single-wire bidirectional
Double-buffered transmit and receive
Master or slave mode
MSB-first or LSB-first shifting
Serial clock phase and polarity options
10-channel, 12-bit analog-to-digital converter
— 3 us single conversion time
— 8-/10-/12-bit resolution
— Left or right justified result data
— Internal oscillator for conversion in stop modes
— Wakeup from low power modes on analog comparison > or <= match
— Continuous conversion mode
— Multiple channel scans
Pins can also be used as digital I/O
Linear voltage regulator with bandgap reference
Low-voltage detect (LVD) with low-voltage interrupt (LVI)
Power-on reset (POR) circuit
Low-voltage reset (LVR)
High temperature sensor
Non-intrusive memory access commands
Supports in-circuit programming of on-chip nonvolatile memory
Serial Peripheral Interface Module (SPI)
Analog-to-Digital Converter Module (ATD)
On-Chip Voltage Regulator (VREG)
Background Debug (BDM)
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
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