S9S12P96J0MFT Freescale Semiconductor, S9S12P96J0MFT Datasheet - Page 81

• Manufacturer Part Number: S9S12P96J0MFT
• Description: MCU 96K FLASH AUTO 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12P96J0MFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Read: Always reads 0x00
1. Read: Anytime. The data source is depending on the data direction value.
2.3.31
2.3.32
Freescale Semiconductor
Function
Address 0x024F
Address 0x0250
Write: Unimplemented
Write: Anytime
Altern.
Field
PTM
PTM
Reset
Reset
5
4
W
W
R
R
Port M general purpose input/output data—Data Register, SPI SCK input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port M general purpose input/output data—Data Register, SPI MOSI input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SPI function takes precedence over the general purpose I/O function if enabled.
• The SPI function takes precedence over the general purpose I/O function if enabled.
PIM Reserved Register
Port M Data Register (PTM)
—
0
0
0
0
7
7
= Unimplemented or Reserved
—
0
0
0
0
6
6
Table 2-28. PTM Register Field Descriptions
Figure 2-30. Port M Data Register (PTM)
S12P-Family Reference Manual, Rev. 1.13
Figure 2-29. PIM Reserved Register
PTM5
SCK
5
0
0
5
0
PTM4
MOSI
0
0
0
4
4
Description
u = Unaffected by reset
PTM3
SS
0
0
0
3
3
PTM2
MISO
0
0
0
2
2
Port Integration Module (S12PPIMV1)
Access: User read/write
TXCAN
PTM1
0
0
0
1
1
Access: User read
RXCAN
PTM0
0
0
0
0
0
81
(1)
(1)