S9S12P96J0MFT Freescale Semiconductor, S9S12P96J0MFT Datasheet - Page 99
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S9S12P96J0MFT
Manufacturer Part Number
S9S12P96J0MFT
Description
MCU 96K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of S9S12P96J0MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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1. Read: Anytime
1. Read: Anytime
2.3.62
2.3.63
Freescale Semiconductor
Address 0x0275
RDR1AD
Address 0x0276
PER0AD
Write: Anytime
Write: Anytime
Field
Field
Reset
Reset
7-0
1-0
W
W
R
R
RDR1AD7
Port AD reduced drive—Select reduced drive for output pin
This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
Port AD pull-up enable—Enable pull-up device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect.
1 Pull device enabled
0 Pull device disabled
Port AD Reduced Drive Register (RDR1AD)
Port AD Pull Up Enable Register (PER0AD)
0
0
0
7
7
RDR1AD6
Figure 2-60. Port AD Reduced Drive Register (RDR1AD)
Figure 2-61. Port AD Pull Up Enable Register (PER0AD)
0
0
0
6
6
Table 2-56. RDR1AD Register Field Descriptions
Table 2-57. PER0AD Register Field Descriptions
RDR1AD5
S12P-Family Reference Manual, Rev. 1.13
5
0
5
0
0
RDR1AD4
0
0
0
4
4
Description
Description
RDR1AD3
0
0
0
3
3
RDR1AD2
0
0
0
2
2
Port Integration Module (S12PPIMV1)
RDR1AD1
PER0AD1
Access: User read/write
Access: User read/write
0
0
1
1
RDR1AD0
PER0AD0
0
0
0
0
99
(1)
(1)
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