S9S12P96J0MFT Freescale Semiconductor, S9S12P96J0MFT Datasheet - Page 92
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S9S12P96J0MFT
Manufacturer Part Number
S9S12P96J0MFT
Description
MCU 96K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of S9S12P96J0MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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1. Read: Always reads 0x00
1. Read: Anytime. The data source is depending on the data direction value.
Port Integration Module (S12PPIMV1)
2.3.48
2.3.49
92
Address 0x0260-0x267
Address 0x0268
7-6, 2-0
Write: Unimplemented
Write: Anytime
Field
Reset
Reset
PTJ
W
W
R
R
Port J general purpose input/output data—Data Register, pin interrupt input/output
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• Pin interrupts can be generated if enabled in input or output mode.
PTJ7
PIM Reserved Registers
Port J Data Register (PTJ)
0
0
0
7
7
= Unimplemented or Reserved
PTJ6
0
0
0
6
6
Table 2-43. PTJ Register Field Descriptions
Figure 2-47. Port J Data Register (PTJ)
S12P-Family Reference Manual, Rev. 1.13
Figure 2-46. PIM Reserved Registers
5
0
0
5
0
0
0
0
0
0
4
4
Description
u = Unaffected by reset
0
0
0
0
3
3
PTJ2
0
0
0
2
2
Access: User read/write
Freescale Semiconductor
PTJ1
0
0
0
1
1
Access: User read
PTJ0
0
0
0
0
0
(1)
(1)
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