HD64F3672FPV Renesas Electronics America, HD64F3672FPV Datasheet - Page 199

• Manufacturer Part Number: HD64F3672FPV
• Description: IC H8/3672 MCU FLASH 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3672FPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.2.59 (3) SUB (L)
Notes
SUB (SUBtract binary)
Operation
ERd – <EAs>
Assembly-Language Format
SUB.L <EAs>, ERd
Operand Size
Longword
Description
This instruction subtracts a source operand from the contents of a 32-bit register ERd (destination
operand) and stores the result in the 32-bit register ERd.
Available Registers
ERd: ER0 to ER7
ERs: ER0 to ER7
Operand Format and Number of States Required for Execution
Immediate
Register direct
Addressing
Mode
Mnemonic Operands
SUB.L
SUB.L
ERd
#xx:32, ERd
ERs, ERd
1st byte
7
1
A
A
1 ers 0 erd
2nd byte
3
0 erd
Condition Code
H: Set to 1 if there is a borrow at bit 27;
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Set to 1 if there is a borrow at bit 31;
3rd byte
Instruction Format
otherwise cleared to 0.
cleared to 0.
cleared to 0.
cleared to 0.
otherwise cleared to 0.
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Rev. 3.00 Dec 13, 2004 page 183 of 258
I
UI
Section 2 Instruction Descriptions
4th byte
H
IMM
—
U
5th byte
N
REJ09B0213-0300
Subtract Binary
Z
6th byte
V
C
States
No. of
6
2