HD64F3672FPV Renesas Electronics America, HD64F3672FPV Datasheet - Page 90

IC H8/3672 MCU FLASH 64LQFP

HD64F3672FPV

Manufacturer Part Number
HD64F3672FPV
Description
IC H8/3672 MCU FLASH 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3672FPV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Section 2 Instruction Descriptions
2.2.22 (2) CMP (W)
CMP (CoMPare)
Operation
Rd – (EAs), set CCR
Assembly-Language Format
CMP.W <EAs>, Rd
Operand Size
Word
Description
This instruction subtracts the source operand from the contents of a 16-bit register Rd (destination
register) and sets or clears the CCR bits according to the result. The contents of the 16-bit register
Rd remain unchanged.
Available Registers
Rd: R0 to R7, E0 to E7
Rs: R0 to R7, E0 to E7
Operand Format and Number of States Required for Execution
Notes
Rev. 3.00 Dec 13, 2004 page 74 of 258
REJ09B0213-0300
Immediate
Register direct
Addressing
Mode
Mnemonic
CMP.W
CMP.W
#xx:16, Rd
Rs, Rd
Operands
1st byte
7
1
D
9
Condition Code
H: Set to 1 if there is a borrow at bit 11;
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Set to 1 if there is a borrow at bit 15;
2nd byte
rs
2
otherwise cleared to 0.
cleared to 0.
cleared to 0.
cleared to 0.
otherwise cleared to 0.
Instruction Format
— —
I
rd
rd
UI
H
3rd byte
U
IMM
N
4th byte
Z
V
Compare
States
No. of
C
4
2

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