HD64F3672FPV Renesas Electronics America, HD64F3672FPV Datasheet - Page 42

• Manufacturer Part Number: HD64F3672FPV
• Description: IC H8/3672 MCU FLASH 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3672FPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 1 CPU
Type
Block data
transfer
instruction
Note:
1.6.4
The H8/300H instructions consist of 2-byte (1-word) units. An instruction consists of an operation
field (OP field), a register field (r field), an effective address extension (EA field), and a condition
field (cc).
Operation Field: Indicates the function of the instruction, the effective address, and the operation
to be carried out on the operand. The operation field always includes the first four bits of the
instruction. Some instructions have two operation fields.
Register Field: Specifies a general register. Address registers are specified by 3 bits, data
registers by 3 bits or 4 bits. Some instructions have two register fields. Some have no register
field.
Effective Address Extension: Eight, 16, or 32 bits specifying immediate data, an absolute
address, or a displacement. A 24-bit address or a displacement is treated as 32-bit data in which
the first 8 bits are 0.
Rev. 3.00 Dec 13, 2004 page 26 of 258
REJ09B0213-0300
* Size refers to the operand size.
Basic Instruction Formats
B: Byte
W: Word
L: Longword
Instruction
EEPMOV.B
EEPMOV.W
Size *
—
—
Function
if R4L
else next;
if R4
else next;
Transfers a data block according to parameters set in
general registers R4L or R4, ER5, and R6.
R4L or R4: size of block (bytes)
ER5: starting source address
R6: starting destination address
Execution of the next instruction begins as soon as the
transfer is completed.
Repeat @ER5 +
Until R4L = 0
Repeat @ER5 +
Until R4 = 0
0 then
0 then
R4L – 1 R4L
R4 – 1 R4L
@ER6 +
@ER6 +