MC9S12XA256CAL Freescale Semiconductor, MC9S12XA256CAL Datasheet - Page 573

• Manufacturer Part Number: MC9S12XA256CAL
• Description: IC MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XA256CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• No. Of Timers: 1
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: S12XA
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 16 Channel)
• Package: 112LQFP
• Family Name: HCS12
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.3.2
A summary of the registers associated with the BDM is shown in
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Freescale Semiconductor
0x7FFF0A
0x7FFF0B
0x7FFF00
0x7FFF01
0x7FFF02
0x7FFF03
0x7FFF04
0x7FFF05
0x7FFF06
0x7FFF07
0x7FFF08
0x7FFF09
Address
Global
BDMCCRH R
Register Descriptions
BDMCCRL R
BDMGPR
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
BDMSTS
Register
Name
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
ENBDM
CCR7
BGAE
Bit 7
X
X
X
X
X
X
0
0
0
0
Figure 15-2. BDM Register Summary
MC9S12XDP512 Data Sheet, Rev. 2.21
= Unimplemented, Reserved
= Indeterminate
BDMACT
CCR6
BGP6
X
X
X
X
X
6
0
0
0
0
CCR5
BGP5
X
X
X
X
X
5
0
0
0
0
0
CCR4
BGP4
SDV
4
X
X
X
X
X
0
0
0
0
Chapter 15 Background Debug Module (S12XBDMV2)
Figure
TRACE
CCR3
BGP3
X
X
X
X
X
3
0
0
0
0
0
15-2. Registers are accessed by
= Implemented (do not alter)
= Always read zero
CLKSW
CCR10
CCR2
BGP2
X
X
X
X
X
2
0
0
0
UNSEC
CCR1
CCR9
BGP1
X
X
X
X
1
0
0
0
0
CCR0
CCR8
BGP0
Bit 0
X
X
X
X
0
0
0
0
0
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