MC9S12XA256CAL Freescale Semiconductor, MC9S12XA256CAL Datasheet - Page 626

IC MCU 256K FLASH 112-LQFP

MC9S12XA256CAL

Manufacturer Part Number
MC9S12XA256CAL
Description
IC MCU 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12XA256CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
16KB
Cpu Speed
80MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XA
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 16 Channel)
Package
112LQFP
Family Name
HCS12
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 17 Memory Mapping Control (S12XMMCV2)
17.3.2.7
Read: Anytime
Write: Anytime
The EEPROM page index register allows accessing up to 256 Kbyte of EEPROM in the global memory
map by using the eight page index bits to page 1 Kbyte blocks into the EEPROM page window located in
the local CPU memory map from address $0800 to address $0BFF (see
The reset value of $FE ensures that there is a linear EEPROM space available between addresses $0800
and $0FFF out of reset.
The fixed 1K page $0C00–$0FFF of EEPROM is equivalent to page 255 (page number $FF).
626
Address: 0x0017
Reset
EP[7:0]
Field
7–0
W
R
EP7
0
EEPROM Page Index Bits 7–0 — These page index bits are used to select which of the 256 EEPROM array
pages is to be accessed in the EEPROM Page Window.
EEPROM Page Index Register (EPAGE)
1
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
0
1
EP6
1
6
Figure 17-13. EEPROM Page Index Register (EPAGE)
0
Figure 17-14. EPAGE Address Mapping
Table 17-12. EPAGE Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
EP5
1
5
Bit17
Global Address [22:0]
EPAGE Register [7:0]
Bit16
CAUTION
EP4
1
4
Description
EP3
1
3
Bit10
Address: CPU Local Address
Bit9
Figure
EP2
or BDM Local Address
1
2
Address [9:0]
1-14).
Freescale Semiconductor
EP1
1
1
Bit0
EP0
0
0

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