MCF52274CLU120 Freescale Semiconductor, MCF52274CLU120 Datasheet - Page 35

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MCF52274CLU120

Manufacturer Part Number
MCF52274CLU120
Description
MCU 32-BIT LCD TOUCH 176-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF5227xr
Datasheet

Specifications of MCF52274CLU120

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, LCD, PWM, WDT
Number Of I /o
47
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LQFP
Family Name
MCF5227x
Device Core
ColdFire
Device Core Size
16b
Frequency (max)
120MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5/1.8/2.5/3.3V
Operating Supply Voltage (max)
1.6/3.6V
Operating Supply Voltage (min)
1.4/1.7/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
176
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF52274CLU120
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
1
2
3
1
Num
Num
S10
All timings specified with a capactive load of 25pF.
SSI_MCLK can be generated from SSI_CLKIN or a divided version of the internal system clock (SYSCLK).
SSI_BCLK can be derived from SSI_CLKIN or a divided version of SYSCLK. If the SYSCLK is used, the minimum
divider is 6. If the SSI_CLKIN input is used, the programmable dividers must be set to ensure that SSI_BCLK does not
exceed 4 x f
S11
S12
S13
S14
S15
S16
S17
S18
All timings specified with a capactive load of 25 pF.
S5
S6
S7
S8
S9
SSI_BCLK to SSI_FS output valid
SSI_BCLK to SSI_FS output invalid
SSI_BCLK to SSI_TXD valid
SSI_BCLK to SSI_TXD invalid / high impedence
SSI_RXD / SSI_FS input setup before SSI_BCLK
SSI_RXD / SSI_FS input hold after SSI_BCLK
SSI_BCLK cycle time
SSI_BCLK to SSI_TXD / SSI_FS output valid
SSI_BCLK to SSI_TXD / SSI_FS output invalid / high
impedence
SSI_BCLK pulse width high / low
SSI_FS input setup before SSI_BCLK
SSI_FS input hold after SSI_BCLK
SSI_RXD setup before SSI_BCLK
SSI_RXD hold after SSI_BCLK
SYS
.
MCF5227x ColdFire
Characteristic
Characteristic
Table 26. SSI Timing—Master Modes
Table 27. SSI Timing—Slave Modes
®
Microprocessor Data Sheet, Rev. 8
Symbol
Symbol
t
BCLK
1
(continued)
4 × 1/f
1
45%
Min
Min
10
10
10
0
0
0
2
0
2
SYS
Max
Max
55%
10
10
10
Electrical Characteristics
t
Unit
Unit
BCLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Notes
35

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