MCF52274CLU120 Freescale Semiconductor, MCF52274CLU120 Datasheet - Page 40

• Manufacturer Part Number: MCF52274CLU120
• Description: MCU 32-BIT LCD TOUCH 176-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF5227xr

Specifications of MCF52274CLU120

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, LCD, PWM, WDT
• Number Of I /o: 47
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LQFP
• Family Name: MCF5227x
• Device Core: ColdFire
• Device Core Size: 16b
• Frequency (max): 120MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5/1.8/2.5/3.3V
• Operating Supply Voltage (max): 1.6/3.6V
• Operating Supply Voltage (min): 1.4/1.7/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 176
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Electrical Characteristics
5.17
40
Num
J1
J2
J3
J4
J5
J6
J7
J8
1
At reset, the SBF_CK cycle time is t
value that is used to set the SBF_CK cycle time for the duration of the serial boot process.
Num
SB1
SB2
SB3
SB4
SB5
SB6
SB7
SB8
TCLK Frequency of Operation
TCLK Cycle Period
TCLK Clock Pulse Width
TCLK Rise and Fall Times
Boundary Scan Input Data Setup Time to TCLK Rise
Boundary Scan Input Data Hold Time after TCLK Rise
TCLK Low to Boundary Scan Output Data Valid
TCLK Low to Boundary Scan Output High Z
JTAG and Boundary Scan Timing Specifications
SBF_CK Cycle Time
SBF_CK High/Low Time
SBF_CS to SBF_CK delay
SBF_CK to SBF_CS delay
SBF_CK to SBF_DO valid
SBF_CK to SBF_DO invalid
SBF_DI to SBF_SCK input setup
SBF_CK to SBF_DI input hold
SBF_DO
SBF_CK
SBF_CS
SBF_DI
Characteristic
MCF5227x ColdFire
Characteristic
Table 33. JTAG and Boundary Scan Timing
Table 32. SBF AC Timing Specifications
REF
SB7
First Data
SB3
× 67. The first byte of data read from the serial memory contains a divider
First Data
1
Figure 27. SBF Timing
SB6
SB8
SB2
®
Microprocessor Data Sheet, Rev. 8
SB1
SB2
Symbol
t
Data
SBFCK
Data
—
—
—
—
—
—
—
t
t
SBFCK
SBFCK
Symbol
Last Data
t
t
30%
f
t
BSDST
BSDHT
t
t
t
Min
SB5
Last Data
t
BSDV
BSDZ
JCYC
JCYC
JCRF
30
JCW
—
0
6
0
– 2.0
– 2.0
SB4
Min
Max
DC
26
26
—
—
—
—
12
—
—
—
4
0
4
0
0
Freescale Semiconductor
t
SBFCK
Unit
ns
ns
ns
ns
ns
ns
ns
Max
1/4
—
—
—
—
33
33
3
Notes
1
f
Unit
t
sys/2
CYC
ns
ns
ns
ns
ns
ns