MCF52274CLU120 Freescale Semiconductor, MCF52274CLU120 Datasheet - Page 6

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MCF52274CLU120

Manufacturer Part Number
MCF52274CLU120
Description
MCU 32-BIT LCD TOUCH 176-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF5227xr
Datasheet

Specifications of MCF52274CLU120

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, LCD, PWM, WDT
Number Of I /o
47
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LQFP
Family Name
MCF5227x
Device Core
ColdFire
Device Core Size
16b
Frequency (max)
120MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5/1.8/2.5/3.3V
Operating Supply Voltage (max)
1.6/3.6V
Operating Supply Voltage (min)
1.4/1.7/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
176
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF52274CLU120
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Hardware Design Considerations
3.3
To minimize noise, an external filters is required for the ADCV
between the board EV
pin as possible.
3.4
The relationship between SDV
or 3.3V) and EV
3.4.1
If EV
connected to the EV
before IV
or there will be high current in the internal ESD protection diodes. The rise times on the power supplies should be slower than
500 us to avoid turning on the internal ESD protection clamp diodes.
3.4.2
If IV
impedance state. There is no limit on how long after IV
down. IV
undesired high current in the ESD protection diodes. There are no requirements for the fall times of the power supplies.
The recommended power down sequence is as follows:
6
1.
2.
DD
DD
/PLLV
/SDV
Drop IV
Drop EV
DD
DD
ADC Power Filtering
Supply Voltage Sequencing
must powered up. IV
should not lag EV
DD
Power Up Sequence
Power Down Sequence
DD
DD
DD
are powered up with IV
are powered down first, then sense circuits in the I/O pads will cause all output drivers to be in a high
DD
are specified relative to IV
DD
/PLLV
/SDV
DD
/SDV
and the ADCV
DD
DD
DD
Board EV
supplies.
to 0 V.
DD
DD
to be in a high impedance state. There is no limit on how long after EV
MCF5227x ColdFire
DD
, SDV
and EV
should not lead the EV
DD
DD
DD
DD
DD
, or PLLV
pin. The resistor and capacitors should be placed as close to the dedicated ADCV
Figure 4. ADC V
at 0 V, then the sense circuits in the I/O pads will cause all pad output drivers
is non-critical during power-up and power-down sequences. Both SDV
DD
0 Ω
.
DD
®
DD
Microprocessor Data Sheet, Rev. 8
going low by more than 0.4 V during power down or there will be
and PLLV
DD
10 µF
, SDV
DD
GND
DD
power pin. The filter shown in
Power Filter
DD
DD
or PLLV
power down before EV
0.1 µF
DD
by more than 0.4 V during power ramp-up,
ADC V
DD
Figure 4
DD
or SDV
Pin
Freescale Semiconductor
DD
should be connected
/SDV
DD
must power
DD
powers up
DD
(2.5V
DD

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