C8051F006-GQR Silicon Laboratories Inc, C8051F006-GQR Datasheet - Page 122
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C8051F006-GQR
Manufacturer Part Number
C8051F006-GQR
Description
IC 8051 MCU 32K FLASH 48TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F00xr
Specifications of C8051F006-GQR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
For Use With
336-1188 - DEV KIT FOR F005/006/007
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F006-GQR
Manufacturer:
SILICON
Quantity:
1 200
Company:
Part Number:
C8051F006-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Status Code
(SMB0STA)
0xA0
0xA8
0xB0
0xB8
0xC0
0xC8
0xD0
0xF8
0x00
0x08
0x10
0x18
0x20
0x28
0x30
0x38
0x40
0x48
0x50
0x58
0x60
0x68
0x70
0x78
0x80
0x88
0x90
0x98
Master Transmitter/Receiver
Master Transmitter/Receiver
Slave Transmitter/Receiver
Master Transmitter
Master Transmitter
Master Transmitter
Master Transmitter
Master Transmitter
Slave Transmitter
Slave Transmitter
Slave Transmitter
Slave Transmitter
Slave Transmitter
Master Receiver
Master Receiver
Master Receiver
Master Receiver
Slave Receiver
Slave Receiver
Slave Receiver
Slave Receiver
Slave Receiver
Slave Receiver
Slave Receiver
Slave Receiver
Slave Receiver
Mode
All
All
Table 16.1. SMBus Status Codes
SMBus State
Bus Error (i.e. illegal START, illegal STOP, …)
START condition transmitted.
Repeated START condition transmitted.
Slave address + W transmitted. ACK received.
Slave address + W transmitted. NACK received.
Data byte transmitted. ACK received.
Data byte transmitted. NACK received.
Arbitration lost
Slave address + R transmitted. ACK received.
Slave address + R transmitted. NACK received
Data byte received. ACK transmitted.
Data byte received. NACK transmitted.
SMB0’s own slave address + W received. ACK transmitted.
Arbitration lost in transmitting slave address + R/W as master.
Own slave address + W received. ACK transmitted.
General call address (0x00) received. ACK returned.
Arbitration lost in transmitting slave address + R/W as master.
General call address received. ACK transmitted.
SMB0’s own slave address + W received. Data byte received.
ACK transmitted.
SMB0’s own slave address + W received. Data byte received.
NACK transmitted.
General call address (0x00) received. Data byte received. ACK
transmitted.
General call address (0x00) received. Data byte received.
NACK transmitted.
A STOP or repeated START received while addressed as a slave.
SMB0’s own slave address + R received. ACK transmitted.
Arbitration lost in transmitting slave address + R/W as master.
Own slave address + R received. ACK transmitted.
Data byte transmitted. ACK received.
Data byte transmitted. NACK received.
Last data byte transmitted (AA=0). ACK received.
SCL Clock High Timer per SMB0CR timed out (FTE=1)
Idle
Rev. 1.7
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
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