HD64F2218UTF24 Renesas Electronics America, HD64F2218UTF24 Datasheet - Page 128
![IC H8S MCU FLASH 128K 100-TQFP](/photos/12/40/124067/hd64f2218utf24_sml.jpg)
HD64F2218UTF24
Manufacturer Part Number
HD64F2218UTF24
Description
IC H8S MCU FLASH 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Specifications of HD64F2218UTF24
Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
For Use With
3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2218UTF24V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
- Current page: 128 of 758
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3.2
The following registers are related to the operating mode.
• Mode control register (MDCR)
• System control register (SYSCR)
3.2.1
MDCR is used to monitor the current operating mode of this LSI. MDCR should not be modified.
Notes: 1. Determined by the FWE and MD2 to MD0 pin settings.
3.2.2
SYSCR is used to select the interrupt control mode and the detected edge for NMI, select the
MRES input pin* enable or disable, and enables or disables on-chip RAM.
Rev.7.00 Dec. 24, 2008 Page 72 of 698
REJ09B0074-0700
Bit
7 to 4
3
2
1
0
2. Supported only by the H8S/2218 Group.
Bit Name
⎯
FWE
MDS2
MDS1
MDS0
Mode Control Register (MDCR)
System Control Register (SYSCR)
Register Descriptions
Initial Value R/W
Undefined
⎯*
⎯*
⎯*
⎯*
1
1
1
1
⎯
R
R
R
R
Description
Reserved
These bits are always read as undefined value and
cannot be modified.
Flash Programming Enable
Reflects the input level at the FWE pin. This bit
functions same as the FWE bit in the FLMCR1
register.
Mode Select 2 to 0
These bits indicate the input levels at pins MD2 to
MD0 (the current operating mode). Bits MDS2 to
MDS0 correspond to MD2 to MD0. MDS2 to MDS0
are read-only bits and they cannot be written to. The
mode pin (MD2 to MD0) input levels are latched into
these bits when MDCR is read.
These latches are canceled by a power-on reset, but
maintained at manual reset*
2
.
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