HD64F2218UTF24 Renesas Electronics America, HD64F2218UTF24 Datasheet - Page 626

IC H8S MCU FLASH 128K 100-TQFP

HD64F2218UTF24

Manufacturer Part Number
HD64F2218UTF24
Description
IC H8S MCU FLASH 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of HD64F2218UTF24

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
For Use With
3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2218UTF24
Manufacturer:
RENESAS
Quantity:
14
Part Number:
HD64F2218UTF24V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Table 17.4 Boot Mode Operation
Table 17.5 System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate Is
Rev.7.00 Dec. 24, 2008 Page 570 of 698
REJ09B0074-0700
Item
Bit rate adjustment
Transmits number of
bytes (N) of programming
control program
Transmits 1-byte of
programming control
program (repeated for N
times)
Flash memory erase
Programming control
program execution
Host Bit Rate
19,200 bps
9,600 bps
4,800 bps
Possible
Host Operation
Continuously transmits data H'00
at specified bit rate
Transmits data H'55 when data
H'00 is received error-free
Transmits number of bytes (N) of
programming control program to
be transferred as 2-byte data (low-
order byte following high-order
byte)
Transmits 1-byte of programming
control program
System Clock Frequency Range of LSI
8 to 24 MHz
6 to 24 MHz
6 to 24 MHz
LSI Operation
Branches to boot program at reset-
start
Measures low-level period of
receive data H'00
Calculates bit rate and sets it in
BRR of SCI_2
Transmits data H'00 to host as
adjustment end indication
Transmits data H'AA to host when
data H'55 is received
Echobacks the 2-byte data received
as verification data
Echobacks received data to host
and also transfers it to RAM
Checks flash memory data, erases
all flash memory blocks in case of
written data existing, and transmits
data H'AA to host. (If erase could
not be done, transmits data H'FF to
host and aborts operation)
Branches to programming control
program transferred to on-chip RAM
and starts execution

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