HD64F2218UTF24 Renesas Electronics America, HD64F2218UTF24 Datasheet - Page 352

IC H8S MCU FLASH 128K 100-TQFP

HD64F2218UTF24

Manufacturer Part Number
HD64F2218UTF24
Description
IC H8S MCU FLASH 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of HD64F2218UTF24

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
For Use With
3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2218UTF24
Manufacturer:
RENESAS
Quantity:
14
Part Number:
HD64F2218UTF24V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Note:
Rev.7.00 Dec. 24, 2008 Page 296 of 698
REJ09B0074-0700
Bit
1
0
Bit Name Initial value
TGFB
TGFA
*
Only 0 can be written to clear the flags.
0
0
R/W
R/(W)* Input Capture/Output Compare Flag B
R/(W)* Input Capture/Output Compare Flag A
Description
Status flag that indicates the occurrence of TGRB input
capture or compare match. The write value should always
be 0 to clear this flag.
[Setting conditions]
[Clearing condition]
Status flag that indicates the occurrence of TGRA input
capture or compare match. The write value should always
be 0 to clear this flag.
[Setting conditions]
[Clearing conditions]
When 0 is written to TGFB after reading TGFB = 1
When TCNT = TGRB while TGRB is functioning as
output compare register
When TCNT value is transferred to TGRB by input
capture signal while TGRB is functioning as input
capture register
When TCNT = TGRA while TGRA is functioning as
output compare register
When TCNT value is transferred to TGRA by input
capture signal while TGRA is functioning as input
capture register
When DMAC is activated by TGIA interrupt while DTA
bit of DMABCR in DMAC is 1
When 0 is written to TGFA after reading TGFA = 1

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