MC68HC11K1CFUE3 Freescale Semiconductor, MC68HC11K1CFUE3 Datasheet - Page 102

• Manufacturer Part Number: MC68HC11K1CFUE3
• Description: MCU 8-BIT 768 RAM 3MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11K1CFUE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Eeprom Size: 640 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Operating Modes and On-Chip Memory
4.9 XOUT Pin Control
4.9.1 System Configuration Register
Technical Data
102
Address: $003F
The XOUT pin provides a buffered XTAL signal to synchronize external
devices with the MCU. It is enabled by the CLKX bit in the system
configuration (CONFIG) register. The frequency of XOUT can be divided
by one-of-four divisors selected by the XDV[1:0] bits in the system
configuration options 2 (OPT2) register. The XOUT pin is not configured
on all packages. Refer to the pin assignments in
Description.
Writable once in normal modes and writable at any time in special modes
CLKX — XOUT Clock Enable Bit
Reset:
Read:
Write:
The CLKX bit is a switch that enables a buffered clock running at the
same frequency as a referenced crystal. This buffered clock is
intended to synchronize external devices with the MCU.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = The XOUT pin is disabled.
1 = The X clock is driven out on the XOUT pin.
Figure 4-14. System Configuration Register (CONFIG)
ROMAD
Operating Modes and On-Chip Memory
Bit 7
—
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6
1
1
CLKX
—
5
PAREN
—
4
NOSEC
3
1
NOCOP
Section 2. Pin
—
2
M68HC11K Family
ROMON
—
1
MOTOROLA
EEON
Bit 0
—