MC68HC11K1CFUE3 Freescale Semiconductor, MC68HC11K1CFUE3 Datasheet - Page 73

• Manufacturer Part Number: MC68HC11K1CFUE3
• Description: MCU 8-BIT 768 RAM 3MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11K1CFUE3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Eeprom Size: 640 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

M68HC11K Family
MOTOROLA
$006A
$006B
$0062
$0063
$0064
$0065
$0066
$0067
$0068
$0069
Addr.
Timer Period 1 Register
Timer Period 2 Register
Timer Period 3 Register
Timer Period 4 Register
Pulse Width Modulation
Pulse Width Modulation
Pulse Width Modulation
Pulse Width Modulation
Pulse Width Modulation
Pulse Width Modulation
Pulse Width Modulation
Pulse Width Modulation
Pulse Width Modulation
Pulse Width Modulation
Timer Enable Register
Register (PWSCAL)
Register (PWCNT1)
Register (PWCNT2)
Register (PWCNT3)
Register (PWCNT4)
Timer Counter 1
Timer Counter 2
Timer Counter 3
Timer Counter 4
Register Name
Timer Prescaler
See page 215.
See page 216.
See page 217.
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Figure 4-1. Register and Control Bit Assignments (Sheet 9 of 11)
(PWPER1)
(PWPER2)
(PWPER3)
(PWPER4)
(PWEN)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
TPWSL
Operating Modes and On-Chip Memory
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
0
0
0
0
0
0
0
0
0
0
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= Unimplemented
DISCP
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
6
0
0
0
0
0
0
0
0
0
0
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
5
0
0
0
0
0
0
0
0
0
0
0
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
4
0
0
0
0
0
0
0
0
0
0
0
R
Operating Modes and On-Chip Memory
= Reserved
PWEN4
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
3
0
0
0
0
0
0
0
0
0
0
PWEN3
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
2
0
0
0
0
0
0
0
0
0
0
U = Undefined
PWEN2
Control Registers
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
1
0
0
0
0
0
0
0
0
0
0
Technical Data
PWEN1
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
0
0
0
0
0
0
0
0
0
0
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