HD64F7145F50 Renesas Electronics America, HD64F7145F50 Datasheet - Page 194
HD64F7145F50
Manufacturer Part Number
HD64F7145F50
Description
IC SUPERH MCU FLASH 256K FP144F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet
1.HD64F7144F50V.pdf
(932 pages)
Specifications of HD64F7145F50
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7145F50
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
HD64F7145F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F7145F50V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
- Current page: 194 of 932
- Download datasheet (6Mb)
9. Bus State Controller (BSC)
Rev.4.00 Mar. 27, 2008 Page 148 of 882
REJ09B0108-0400
Bit
11
10
9
8
Bit Name Initial Value R/W
IW11
IW10
IW01
IW00
1
1
1
1
R/W
R/W
R/W
R/W
Description
Idle cycles in CS1 and CS5 space cycles
After read access to the CS1 and CS5 spaces, these bits
insert idle cycles (1) when the write cycle to the CS1
space continues, (2) when the write cycle to the CS5
space continues, or (3) when continuous access is made
to CS spaces except for the CS1 and CS5 spaces.
00: No idle cycle inserted after access to the CS1 and
01: One idle cycle inserted after access to the CS1 and
10: Two idle cycles inserted after access to the CS1 and
11: Three idle cycles inserted after access to the CS1
Idle cycles in CS0 and CS4 space cycles
After read access to the CS0 and CS4 spaces, these bits
insert idle cycles (1) when the write cycle to the CS0
space continues, (2) when the write cycle to the CS4
space continues, or (3) when continuous access is made
to CS spaces except for the CS0 and CS4 spaces.
00: No idle cycle inserted after access to the CS0 and
01: One idle cycle inserted after access to the CS0 and
10: Two idle cycles inserted after access to the CS0 and
11: Three idle cycles inserted after access to the CS0
and CS5 spaces
and CS4 spaces
CS5 spaces
CS5 spaces
CS5 spaces
CS4 spaces
CS4 spaces
CS4 spaces
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