HD64F7145F50 Renesas Electronics America, HD64F7145F50 Datasheet - Page 539

IC SUPERH MCU FLASH 256K FP144F

HD64F7145F50

Manufacturer Part Number
HD64F7145F50
Description
IC SUPERH MCU FLASH 256K FP144F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet

Specifications of HD64F7145F50

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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14.4
The I
format.
14.4.1
The I
format includes the transfer of acknowledge bits. This is shown in figure 14.3. The first frame
after the start condition always consists of nine bits.
The serial format is referred to as a ‘non-addressing format’. The transfer of data in this non-
addressing format does not include the transfer of an acknowledge bit. This is shown in figure
14.4. The I
The symbols used in figures 14.3 to 14.5 are described in table 14.6.
(a) FS=0 or FSX=0
(b) When the start condition is re-transmitted, FS=0 or FSX=0
S
S
1
1
2
2
C bus interface is capable of transferring data in either the serial format or the I
C bus format is referred to as an addressing format. The transfer of data in this addressing
Operation
SLA
SLA
I
7
7
2
2
C Bus Data Formats
C bus timing is shown in figure 14.5.
1
1
R/W
1
FS=1 and FSX=1
R/W
1
Figure 14.3 I
S
1
A
Figure 14.4 I
1
A
1
DATA
DATA
n1
DATA
8
1
n
m1
2
C Bus Data Format (I
2
C Bus Data Format (Serial Format)
A
A/A
1
1
DATA
m
n
S
1
m
Upper: Number of bits being transferred (n=1, n2=1 to 8)
Lower: Number of frames being transferred (m=1, m2=1 or above)
SLA
7
A/A
1
Rev.4.00 Mar. 27, 2008 Page 493 of 882
1
R/W
1
P
2
1
C Bus Format)
P
1
A
Number of bits
being transferred
(n=1 to 8)
Number of frames
being transferred
(m=1 or above)
1
14. I
Number of bits
being transferred
(n=1 to 8)
Number of frames
being transferred
(m=1 or above)
DATA
2
C Bus Interface (IIC) Option
n2
m2
REJ09B0108-0400
A/A
1
2
C bus
P
1

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