MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 190
![IC MCU 33MHZ 128K FLASH 144-LQFP](/photos/12/42/124277/mmc2107cfcag33_sml.jpg)
MMC2107CFCAG33
Manufacturer Part Number
MMC2107CFCAG33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet
1.MMC2107CFCAF33.pdf
(618 pages)
Specifications of MMC2107CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2107
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
72
Number Of Timers
2
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Cpu Family
Mcore
Device Core
MCORE
Device Core Size
32b
Frequency (max)
33MHz
Total Internal Ram Size
8KB
# I/os (max)
72
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
3.6/5.5V
Operating Supply Voltage (min)
2.7/4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2107CFCAG33
Manufacturer:
FREESCALE
Quantity:
210
Company:
Part Number:
MMC2107CFCAG33
Manufacturer:
freescaie
Quantity:
35
Company:
Part Number:
MMC2107CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Non-Volatile Memory FLASH (CMFR)
Technical Data
190
NOTE:
NOTE:
When SIE = 1, only the program page buffer associated with the lowest
block can be programmed. The other program page buffers cannot be
accessed and do not apply any programming voltages to their array
blocks while programming the shadow information. The shadow
information is in block 0.
LOCKCTL — Lock Control Bit
If LOCKCTL is set before PROTECT[7:0] is cleared, the device must use
debug mode to program or erase the CMFR.
DIS — Disable Bit
The address range of the shadow information is the entire address
range of the array, but the high order array addresses, are not used
to encode the location.
The read-always, set-once LOCKCTL bit controls the write-lock
function. Once the LOCKCTL bit is set in normal operation, the
write-lock can only be disabled again by a master reset. The
LOCKCTL bit is writable if the device is in debug mode.
Setting the LOCKCTL bit locks the SUPV[7:0], DATA[7:0] and
PROTECT[7:0] bits. Writing to these bits has no effect; the cycle ends
normally and the bits do not change.
The default reset state of LOCKCTL is 0. It can be set once after
master reset to allow protection of the write-locked register bits after
initialization.
If the LOCKCTL bit and write-locked register bits are written
simultaneously, the new value does not affect the current cycle.
The read-always DIS bit disables array information. Writing to DIS has
no effect if the SES bit is set. When DIS is set, the array is disabled
and the CMFR BIU does not respond to array accesses.
The reset value is defined during reset configuration by the external
D28 pin.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Write-locked registers protected
0 = Write-lock disabled
1 = Array information disabled
0 = Array information enabled
Non-Volatile Memory FLASH (CMFR)
Go to: www.freescale.com
MMC2107 – Rev. 2.0
MOTOROLA
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