MMC2107CFCAG33 Freescale Semiconductor, MMC2107CFCAG33 Datasheet - Page 395
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MMC2107CFCAG33
Manufacturer Part Number
MMC2107CFCAG33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet
1.MMC2107CFCAF33.pdf
(618 pages)
Specifications of MMC2107CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2107
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
72
Number Of Timers
2
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Cpu Family
Mcore
Device Core
MCORE
Device Core Size
32b
Frequency (max)
33MHz
Total Internal Ram Size
8KB
# I/os (max)
72
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
3.6/5.5V
Operating Supply Voltage (min)
2.7/4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2107CFCAG33
Manufacturer:
FREESCALE
Quantity:
210
Company:
Part Number:
MMC2107CFCAG33
Manufacturer:
freescaie
Quantity:
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Part Number:
MMC2107CFCAG33
Manufacturer:
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10 000
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17.8.7 Error Conditions
17.8.7.1 Write Collision Error
17.8.7.2 Mode Fault Error
MMC2107 – Rev. 2.0
MOTOROLA
The SPI has two error conditions:
The WCOL flag in SPISR indicates that a serial transfer was in progress
when the MCU tried to write new data to SPIDR. Valid write times are
listed below (see
and t
A write during any other time causes a WCOL error. The write is disabled
to avoid writing over the data being transmitted. WCOL does not
generate an interrupt request because the WCOL flag can be read upon
completion of the transmission that was in progress at the time of the
error.
If the SS input of a master SPI goes low, it indicates a system error in
which more than one master may be trying to drive the MOSI and SCK
lines simultaneously. This condition is not permitted in normal operation;
it sets the MODF flag in SPISR. If the SPIE bit in SPICR1 is also set,
MODF generates an interrupt request.
Configuring the SS pin as a general-purpose output or a slave-select
output disables the mode fault function.
A mode fault clears the SPE and MSTR bits and the DDRSP bits of the
SCK, MISO, and MOSI (or MOMI) pins. This forces those pins to be
high-impedance inputs to avoid any conflict with another output driver.
•
•
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Freescale Semiconductor, Inc.
For More Information On This Product,
I
):
Write collision error
Mode fault error
In master mode, a valid write is within t
In slave phase 0, a valid write within t
In slave phase 1, a valid write is within t
edge and before SS goes low), excluding the first two SPI clocks
after the last SCK edge (the beginning of t
Serial Peripheral Interface Module (SPI)
Go to: www.freescale.com
Figure 17-11
and
Figure 17-12
Serial Peripheral Interface Module (SPI)
I
(when SS is high).
I
T
(when SS is high).
or t
T
for definitions of t
is an illegal write).
I
(after the last SCK
Functional Description
Technical Data
T
395
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