DF2239TF16I Renesas Electronics America, DF2239TF16I Datasheet - Page 336
DF2239TF16I
Manufacturer Part Number
DF2239TF16I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2238RFA6V.pdf
(1048 pages)
Specifications of DF2239TF16I
Core Processor
H8S/2000
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2239TF16I
HD64F2239TF16I
HD64F2239TF16I
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Section 8 DMA Controller (DMAC)
8.5.15
Figure 8.36 shows the procedure for releasing and initializing a channel designated for full address
mode. After full address mode has been cleared, the channel can be set to another transfer mode
using the appropriate setting procedure.
Rev. 6.00 Mar. 18, 2010 Page 274 of 982
REJ09B0054-0600
Figure 8.35 Example of Procedure for Forcibly Terminating DMAC Operation
Clearing Full Address Mode
Figure 8.36 Example of Procedure for Clearing Full Address Mode
Forced termination
Forced termination
Clear DTE bit to 0
of DMAC
Clear FAE bit to 0
Stop the channel
Initialize DMACR
operation halted
address mode
Initialization;
Clearing full
[1]
[1]
[2]
[3]
[1]
[1]
[2]
[3]
Clear both the DTE bit and DTME bit in
DMABCRL to 0, or wait until the transfer ends
and the DTE bit is cleared to 0, then clear the
DTME bit to 0. Also clear the corresponding
DTIE bit to 0 at the same time.
Clear all bits in DMACRA and DMACRB to 0.
Clear the FAE bit in DMABCRH to 0.
Clear the DTE bit in DMABCRL to 0.
To prevent interrupt generation after forced
termination of DMAC operation, clear the DTIE bit
to 0 at the same time.
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