HD6417727F160CV Renesas Electronics America, HD6417727F160CV Datasheet - Page 857

IC SH MPU ROMLESS 240QFN

HD6417727F160CV

Manufacturer Part Number
HD6417727F160CV
Description
IC SH MPU ROMLESS 240QFN
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F160CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417727F160CV
Manufacturer:
RENESAS
Quantity:
37
Part Number:
HD6417727F160CV
Manufacturer:
RENESAS
Quantity:
753
Company:
Part Number:
HD6417727F160CV
Quantity:
400
25.3.4
1. Packed 1bpp (Pixel Alignment in Byte is Big Endian) [Windows CE Recommended Format]
2. Packed 2bpp (Pixel Alignment in Byte is Big Endian) [Windows CE Recommended Format]
3. Packed 4bpp (Pixel Alignment in Byte is Big Endian) [Windows CE Recommended Format]
4. Packed 1bpp (Pixel Alignment in Byte is Little Endian)
Address
+00
+01
+02
+03
+LAO+00
+LAO+01
+LAO+02
+LAO+03
Address
+00
+01
+02
+03
+LAO+00
+LAO+01
+LAO+02
+LAO+03
Address
+00
+01
+02
+03
+LAO+00
+LAO+01
+LAO+02
+LAO+03
Address
+00
+01
+02
+03
+LAO+00
+LAO+01
+LAO+02
+LAO+03
Data Format
MSB
MSB
MSB
MSB
P00
P08
P10
P18
P07
P17
P00
P04
P10
P14
7
7
7
7
P01 P02 P03 P04 P05 P06 P07
P11 P12 P13 P14 P15 P16 P17
P06 P05 P04 P03 P02 P01 P00
P16 P15 P14 P13 P12 P11 P10
6
6
6
6
P00
P02
P04
P00
P02
P04
Display Memory
Display Memory
Display Memory
Display Memory
P01
P05
P11
P15
5
5
5
5
4
4
4
4
P02
P06
P12
P16
3
3
3
3
2
2
2
P01
P03
P05
P01
P03
P05
2
P03
P07
P13
P17
1
1
1
1
LSB
LSB
LSB
LSB
P08
P18
0
0
0
0
[Bit]
(Byte0)
(Byte1)
[Bit]
(Byte0)
(Byte1)
[Bit]
(Byte0)
(Byte1)
(Byte2)
[Bit]
(Byte0)
(Byte1)
Rev.6.00 Mar. 27, 2009 Page 799 of 1036
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
LAO: Line Address Offset
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
LAO: Line Address Offset
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
LAO: Line Address Offset
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
LAO: Line Address Offset
↓ Top Left Pixel
↓ Top Left Pixel
↓ Top Left Pixel
↓ Top Left Pixel
Section 25 LCD Controller
Pn=Pn[1:0]: Put 2bit data
Pn=Pn[3:0]: Put 4bit data
⎯Unused bits should be 0
⎯Unused bits should be 0
⎯Unused bits should be 0
⎯Unused bits should be 0
Pn: Put 1bit data
Pn: Put 1bit data
REJ09B0254-0600
Display
Display
Display
Display

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