PIC16LC774/PQ Microchip Technology, PIC16LC774/PQ Datasheet - Page 74

• Manufacturer Part Number: PIC16LC774/PQ
• Description: IC MCU OTP 4KX14 A/D PWM 44-MQFP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC774/PQ

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-MQFP, 44-PQFP
• Processor Series: PIC16LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, SSP, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16C77X
8.2.9
To initiate a START condition, the user sets the start
condition enable bit, SEN (SSPCON2<0>). If the SDA
and SCL pins are sampled high, the baud rate genera-
tor is re-loaded with the contents of SSPADD<6:0>,
and starts its count. If SCL and SDA are both sampled
high when the baud rate generator times out (T
the SDA pin is driven low. The action of the SDA being
driven low while SCL is high is the START condition,
and causes the S bit (SSPSTAT<3>) to be set. Follow-
ing this, the baud rate generator is reloaded with the
contents of SSPADD<6:0> and resumes its count.
When the baud rate generator times out (T
SEN bit (SSPCON2<0>) will be automatically cleared
by hardware, the baud rate generator is suspended
leaving the SDA line held low, and the START condition
is complete.
FIGURE 8-20: FIRST START BIT TIMING
DS30275A-page 74
Note:
I
TIMING
2
C MASTER MODE START CONDITION
If at the beginning of START condition the
SDA and SCL pins are already sampled
low, or if during the START condition the
SCL line is sampled low before the SDA
line is driven low, a bus collision occurs, the
Bus Collision Interrupt Flag (BCLIF) is set,
the START condition is aborted, and the
I
2
C module is reset into its IDLE state.
Write to SEN bit occurs here.
SDA
SCL
Advance Information
BRG
SDA = 1,
SCL = 1
T
), the
BRG
BRG
),
Set S bit (SSPSTAT<3>)
S
T
BRG
At completion of start bit,
Hardware clears SEN bit
8.2.9.5
If the user writes the SSPBUF when an START
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
and sets SSPIF bit
Note:
T
Write to SSPBUF occurs here
BRG
1st Bit
WCOL STATUS FLAG
Because queueing of events is not
allowed, writing to the lower 5 bits of
SSPCON2 is disabled until the START
condition is complete.
T
BRG
1999 Microchip Technology Inc.
2nd Bit