ATMEGA163L-4AI Atmel, ATMEGA163L-4AI Datasheet - Page 154

IC AVR MCU 16K A/D 2.7V 44TQFP

ATMEGA163L-4AI

Manufacturer Part Number
ATMEGA163L-4AI
Description
IC AVR MCU 16K A/D 2.7V 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA163L-4AI

Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA163L-4AI
Manufacturer:
ATMEL
Quantity:
984
Serial Downloading
154
ATmega163(L)
Both the Flash and EEPROM memory arrays can be programmed using the serial SPI
bus while RESET is pulled to GND. The serial interface consists of pins SCK, MOSI
(input) and MISO (output). After RESET is set low, the Programming Enable instruction
needs to be executed first before program/erase operations can be executed.
Figure 86. Serial Programming and Verify
Notes:
When programming the EEPROM, an auto-erase cycle is built into the self-timed pro-
gramming operation (in the Serial mode ONLY) and there is no need to first execute the
Chip Erase instruction. The Chip Erase operation turns the content of every memory
location in both the Program and EEPROM arrays into $FF.
The Program and EEPROM memory arrays have separate address spaces:
$0000 to $1FFF for Program memory and $0000 to $01FF for EEPROM memory.
The device can be clocked by any clock option during Serial Programming. The mini-
mum low and high periods for the serial clock (SCK) input are defined as follows:
Low: > 2 MCU clock cycles
High: > 2 MCU clock cycles
1. If the device is clocked by the internal Oscillator, connecting a clock source to XTAL1
2. V
is not required.
5.5 V.
CC
- 0.3 V < AVCC < V
MOSI
MISO
SCK
CC
PB5
PB6
PB7
XTAL1
RESET
GND
+ 0.3 V, however, AVCC should always be within 2.7 -
ATmega163
(1)
AGND
AVCC
VCC
2.7 - 5.5V
2.7 - 5.5V
(2)
1142E–AVR–02/03

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