PIC16C770-E/SO Microchip Technology, PIC16C770-E/SO Datasheet - Page 13

• Manufacturer Part Number: PIC16C770-E/SO
• Description: IC MCU OTP 2KX14 A/D PWM 20SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C770-E/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SOIC (7.5mm Width)
• For Use With: AC164028 - MODULE SKT PROMATEII 20SOIC/DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC16C770E/SO

2.2.2
The Special Function Registers are registers used by
the CPU and Peripheral Modules for controlling the
desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Table 2-1.
TABLE 2-1:
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as ’0’.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
Address Name
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
2002 Microchip Technology Inc.
Bank 0
(3)
(3)
(3)
(3)
(1,3)
(3)
2: Other (non Power-up) Resets include external RESET through MCLR and Watchdog Timer Reset.
3: These registers can be addressed from any bank.
Shaded locations are unimplemented, read as ‘0’.
contents are transferred to the upper byte of the program counter.
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
ADRESH
ADCON0
SPECIAL FUNCTION REGISTERS
—
—
—
—
—
—
—
—
—
PIC16C717/770/771 SPECIAL FUNCTION REGISTER SUMMARY
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 module’s register
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
Unimplemented
Unimplemented
Unimplemented
Holding register for the Least Significant Byte of the 16-bit TMR1 register
Holding register for the Most Significant Byte of the 16-bit TMR1 register
Timer2 module’s register
Synchronous Serial Port Receive Buffer/Transmit Register
Capture/Compare/PWM Register1 (LSB)
Capture/Compare/PWM Register1 (MSB)
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
A/D High Byte Result Register
PWM1M1
ADCS1
WCOL
LVDIF
Bit 7
RA7
RB7
IRP
GIE
—
—
—
—
TOUTPS3
PWM1M0
SSPOV
ADCS0
PEIE
ADIF
Bit 6
RP1
RA6
RB6
—
—
—
TOUTPS2
T1CKPS1
SSPEN
DC1B1
CHS2
Bit 5
T0IE
RP0
RA5
RB5
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
TOUTPS1
T1CKPS0
DC1B0
CHS1
INTE
Bit 4
CKP
RA4
RB4
TO
—
—
T1OSCEN
TOUTPS0
CCP1M3
The special function registers can be classified into two
sets; core (CPU) and peripheral. Those registers asso-
ciated with the core functions are described in detail in
this section. Those related to the operation of the
peripheral features are described in detail in that
peripheral feature section.
SSPM3
SSPIF
BCLIF
CHS0
RBIE
Bit 3
RA3
RB3
PD
PIC16C717/770/771
GO/DONE
TMR2ON
CCP1M2
T1SYNC
CCP1IF
SSPM2
Bit 2
RA2
RB2
T0IF
—
Z
T2CKPS1
TMR1CS
CCP1M1
TMR2IF
SSPM1
CHS3
INTF
Bit 1
RA1
RB1
DC
—
T2CKPS0 -000 0000
TMR1ON
CCP1M0
TMR1IF
SSPM0
ADON
RBIF
Bit 0
RA0
RB0
—
C
DS41120B-page 11
0000 0000
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx 0000
xxxx xx11
---0 0000
0000 000x
-0---0000
0--- 0---
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
xxxx xxxx
0000 0000
Value on:
POR,
BOR
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—
—
—
—
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