ATMEGA64-16MC Atmel, ATMEGA64-16MC Datasheet - Page 246

• Manufacturer Part Number: ATMEGA64-16MC
• Description: IC AVR MCU 64K 16MHZ COM 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64-16MC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-MLF®, 64-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ADCL and ADCH –
The ADC Data
Register
ADLAR = 0
ADLAR = 1
2490Q–AVR–06/10
• Bits 2:0 – ADPS2:0: ADC Prescaler Select Bits
These bits determine the division factor between the XTAL frequency and the input clock to the
ADC.
Table 99. ADC Prescaler Selections
When an ADC conversion is complete, the result is found in these two registers. If differential
channels are used, the result is presented in two’s complement form.
When ADCL is read, the ADC Data Register is not updated until ADCH is read. Consequently, if
the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read
ADCH. Otherwise, ADCL must be read first, then ADCH.
The ADLAR bit in ADMUX, and the MUXn bits in ADMUX affect the way the result is read from
the registers. If ADLAR is set, the result is left adjusted. If ADLAR is cleared (default), the result
is right adjusted.
Bit
0x05 (0x25)
0x04 (0x24)
Read/Write
Initial Value
Bit
0x05 (0x25)
0x04 (0x24)
Read/Write
Initial Value
ADPS2
0
0
0
0
1
1
1
1
ADC7
ADC9
ADC1
15
15
R
R
R
R
–
7
0
0
7
0
0
ADC6
ADC8
ADC0
14
14
ADPS1
R
R
R
R
–
6
0
0
6
0
0
0
0
1
1
0
0
1
1
ADC5
ADC7
13
13
R
R
R
R
–
5
0
0
–
5
0
0
ADC4
ADC6
12
12
R
R
R
R
–
4
0
0
–
4
0
0
ADPS0
0
1
0
1
0
1
0
1
ADC3
ADC5
11
11
R
R
R
R
–
3
0
0
–
3
0
0
ADC2
ADC4
10
10
R
R
R
R
–
2
0
0
–
2
0
0
ADC9
ADC1
ADC3
Division Factor
R
R
R
R
9
1
0
0
9
–
1
0
0
128
16
32
64
ATmega64(L)
2
2
4
8
ADC8
ADC0
ADC2
R
R
R
R
8
0
0
0
8
–
0
0
0
ADCH
ADCL
ADCH
ADCL
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