ATMEGA64-16MC Atmel, ATMEGA64-16MC Datasheet - Page 71

• Manufacturer Part Number: ATMEGA64-16MC
• Description: IC AVR MCU 64K 16MHZ COM 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64-16MC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-MLF®, 64-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Alternate Port
Functions
2490Q–AVR–06/10
ing inputs should be avoided to reduce current consumption in all other modes where the digital
inputs are enabled (Reset, Active mode and Idle mode).
The simplest method to ensure a defined level of an unused pin, is to enable the internal pull-up.
In this case, the pull-up will be disabled during reset. If low power consumption during reset is
important, it is recommended to use an external pull-up or pull-down. Connecting unused pins
directly to VCC or GND is not recommended, since this may cause excessive currents if the pin
is accidentally configured as an output.
Most port pins have alternate functions in addition to being general digital I/Os.
how the port pin control signals from the simplified
functions. The overriding signals may not be present in all port pins, but the figure serves as a
generic description applicable to all port pins in the AVR microcontroller family.
Figure 33. Alternate Port Functions
Note:
Table 26
ure 33
the modules having the alternate function.
are not shown in the succeeding tables. The overriding signals are generated internally in
1. WPx, WDx, RLx, RPx, and RDx are common to all pins within the same port. clk
summarizes the function of the overriding signals. The pin and port indexes from
PUOExn:
PUOVxn:
DDOExn:
DDOVxn:
PVOExn:
PVOVxn:
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
SLEEP:
Pxn
and PUD are common to all ports. All other signals are unique for each pin.
Pxn PULL-UP OVERRIDE ENABLE
Pxn PULL-UP OVERRIDE VALUE
Pxn DATA DIRECTION OVERRIDE ENABLE
Pxn DATA DIRECTION OVERRIDE VALUE
Pxn PORT VALUE OVERRIDE ENABLE
Pxn PORT VALUE OVERRIDE VALUE
SLEEP CONTROL
1
0
1
0
1
0
1
0
(1)
PUOExn
PUOVxn
PVOExn
PVOVxn
DIEOExn
DIEOVxn
SLEEP
DDOExn
DDOVxn
SYNCHRONIZER
PUD:
WDx:
RDx:
RRx:
WPx:
RPx:
clk
DIxn:
AIOxn:
D
L
Figure 30
I/O
SET
CLR
:
Q
Q
WRITE DDRx
WRITE PORTx
PULLUP DISABLE
READ DDRx
READ PORTx REGISTER
READ PORTx PIN
I/O CLOCK
DIGITAL INPUT PIN n ON PORTx
ANALOG INPUT/OUTPUT PIN n ON PORTx
D
PINxn
CLR
Q
Q
can be overridden by alternate
RESET
RESET
PORTxn
Q
Q
Q
Q
DDxn
CLR
CLR
D
D
ATmega64(L)
clk
PUD
WDx
WPx
RRx
DIxn
AIOxn
RDx
RPx
I/O
Figure 33
I/O
, SLEEP,
shows
Fig-
71