ATMEGA64-16MC Atmel, ATMEGA64-16MC Datasheet - Page 36
ATMEGA64-16MC
Manufacturer Part Number
ATMEGA64-16MC
Description
IC AVR MCU 64K 16MHZ COM 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64-16MC
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-MLF®, 64-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Using all 64Kbytes
Locations of External
Memory
2490Q–AVR–06/10
Since the external memory is mapped after the internal memory as shown in
Kbytes of external memory is available by default (address space 0x0000 to 0x10FF is reserved
for internal memory). However, it is possible to take advantage of the entire external memory by
masking the higher address bits to zero. This can be done by using the XMMn bits and con-
trolled by software the most significant bits of the address. By setting Port C to output 0x00, and
releasing the most significant bits for normal Port Pin operation, the Memory Interface will
address 0x0000 - 0x1FFF. See code examples below.
Note:
Care must be exercised using this option as most of the memory is masked away.
Assembly Code Example
C Code Example
#define OFFSET 0x2000
void XRAM_example(void)
{
unsigned char *p = (unsigned char *) (OFFSET + 1);
DDRC = 0xFF;
PORTC = 0x00;
XMCRB = (1<<XMM1) | (1<<XMM0);
*p = 0xaa;
XMCRB = 0x00;
*p = 0x55;
}
; OFFSET is defined to 0x2000 to ensure
; external memory access
; Configure Port C (address high byte) to
; output 0x00 when the pins are released
; for normal Port Pin operation
ldi
out
ldi
out
; release PC7:5
ldi
sts
; write 0xAA to address 0x0001 of external
; memory
ldi
sts
; re-enable PC7:5 for external memory
ldi
sts
; store 0x55 to address (OFFSET + 1) of
; external memory
ldi
sts
1. See “About Code Examples” on page 9.
r16, 0xFF
DDRC, r16
r16, 0x00
PORTC, r16
r16, (1<<XMM1)|(1<<XMM0)
XMCRB, r16
r16, 0xaa
0x0001+OFFSET, r16
r16, (0<<XMM1)|(0<<XMM0)
XMCRB, r16
r16, 0x55
0x0001+OFFSET, r16
(1)
(1)
ATmega64(L)
Figure
11, only 60
36
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