DSPIC30F2010-30I/SO Microchip Technology, DSPIC30F2010-30I/SO Datasheet

IC DSPIC MCU/DSP 12K 28SOIC

DSPIC30F2010-30I/SO

Manufacturer Part Number
DSPIC30F2010-30I/SO
Description
IC DSPIC MCU/DSP 12K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F2010-30I/SO

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Package
28SOIC W
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
20
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
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The dsPIC30F2010 (Rev. A1) samples that you have
received conform to the specifications and functionality
described in the following documents:
• DS70157 – “dsPIC30F/33F Programmer’s
• DS70118 – “dsPIC30F2010 Data Sheet”
• DS70046 – “dsPIC30F Family Reference Manual”
The exceptions to the specifications in the documents
listed above are described in this Errata.
dsPIC30F2010 Rev A1 silicon is identified by
performing a “Reset and Connect” operation to the
device using MPLAB
The following text is visible under the MPLAB ICD 2
section in the Output window within MPLAB IDE:
MPLAB ICD 2 Ready
Connecting to MPLAB ICD 2
...Connected
Setting Vdd source to target
Target Device dsPIC30F2010 found,
revision = 0x1
...Reading ICD Product ID
Running ICD Self Test
...Passed
MPLAB ICD 2 Ready
The errata described in this section will be addressed
in future revisions of dsPIC30F2010 silicon.
Silicon Errata Summary
The following list summarizes the errata described in
this document:
1.
2.
3.
© 2008 Microchip Technology Inc.
Reference Manual”
Y Data Space Dependency
When an instruction that writes to a location in the
address range of Y data memory is immediately
followed by a MAC type DSP instruction that reads
a location also resident in Y data memory, the
operations will not be performed as specified.
MAC Class Instructions with +4 Address
Modification
Sequential MAC instructions, which prefetch data
from Y data space using +4 address modification
will cause an address error trap.
Decimal Adjust Instruction
The Decimal Adjust instruction, DAW.b, may
improperly clear the Carry bit, C (SR<0>).
®
dsPIC30F2010 Rev. A1 Silicon Errata
ICD 2 within the MPLAB IDE.
dsPIC30F2010
4.
5.
6.
7.
8.
9.
10. Output Compare
11. 10-bit Analog-to-Digital Converter (ADC) –
12. INT0, ADC and Sleep Mode
13. Watchdog Timer
PSV Operations Using SR
In certain instructions, fetching one of the
operands from program memory using Program
Space Visibility (PSV) will corrupt specific bits in
the STATUS Register, SR.
Early Termination of Nested DO Loops
When using two DO loops in a nested fashion,
terminating the inner-level DO loop by setting the
EDT (CORCON<11>) bit will produce unexpected
results.
Interrupting a REPEAT Loop
When a REPEAT loop is interrupted by two or more
interrupts in a nested fashion, an address error
trap may be caused.
DISI Instruction
The DISI instruction will not disable interrupts if a
DISI instruction is executed in the same
instruction
decrements to zero.
32-bit General Purpose Timers
The 32-bit general purpose timers do not function
as specified for prescaler ratios other than 1:1.
Output Compare Module in PWM Mode
Output compare will produce a glitch when loading
a 0% duty cycle in PWM mode. It will also miss the
next compare after the glitch.
The output compare module will produce a glitch
on the output when an I/O pin is initially set high
and the module is configured to drive the pin low at
a specified time.
Sequential Sampling
Sampling multiple channels sequentially using
any conversion trigger other than the auto-convert
feature requires SAMC bits to be non-zero.
ADC event triggers from the INT0 pin will not
wake-up the device from Sleep mode if the SMPIx
bits are non-zero.
The Watchdog Timer does not function as
specified.
cycle
that
the
DS80186J-page 1
DISI
counter

Related parts for DSPIC30F2010-30I/SO

DSPIC30F2010-30I/SO Summary of contents

Page 1

... Rev. A1 Silicon Errata The dsPIC30F2010 (Rev. A1) samples that you have received conform to the specifications and functionality described in the following documents: • DS70157 – “dsPIC30F/33F Programmer’s Reference Manual” • DS70118 – “dsPIC30F2010 Data Sheet” • DS70046 – “dsPIC30F Family Reference Manual” ...

Page 2

... PLL Operation The 4x PLL mode of operation may not function correctly for certain input frequencies. 15. Interrupt Controller – Sequential Interrupts Sequential interrupts after modifying the CPU IPL, interrupt IPL, interrupt enable or interrupt flag may cause an address error trap. 16. 8x PLL Mode If 8x PLL mode is used, the input frequency range is 5-10 MHz instead of 4-10 MHz ...

Page 3

... DSP MAC type instruction that performs a read operation of a location in Y data memory. © 2008 Microchip Technology Inc. dsPIC30F2010 2. Module: MAC Class Instructions with +4 Address Modification Sequential MAC class instructions, which prefetch data from Y data space using +4 address modification, will cause an address error trap ...

Page 4

... Table 1. The work around for Example 4 is demonstrated in Example 5. DS80186J-page 4 These instructions are identified in Table 1. Example 4 demonstrates a scenario where this occurs. Also, always use Work around 2 if the C compiler is used to generate code for dsPIC30F2010 devices. (2) Examples of Incorrect Operation ADDC W0, [W1++], W2 ; SUBB.b W0, [++W1 SUBBR.b W0, [++W1 ...

Page 5

... For details on the functionality of EDT bit, see section 2.9.2.4 in the dsPIC30F Family Reference Manual. © 2008 Microchip Technology Inc. dsPIC30F2010 6. Module: Interrupting a REPEAT When interrupt nesting is enabled (or NSTDIS (INTCON1<15>) bit is ‘0’), the following sequence of events will lead to an address error trap: 1 ...

Page 6

... Module: DISI Instruction When a user executes a DISI #7, for example, this will disable interrupts for cycles (7 + the DISI instruction itself). In this case, the DISI instruction uses a counter which counts down from The counter is loaded with 7 at the end of the DISI instruction. ...

Page 7

... None. If ADC event trigger from the INT0 pin is required, initialize SMPI<3:0> to ‘0000’ (interrupt on every conversion). © 2008 Microchip Technology Inc. dsPIC30F2010 13. Module: Watchdog Timer The Watchdog Timer does not function as specified. If the CLRWDT instruction is not executed before the Watchdog Timer is half-expired or ...

Page 8

... Module: Interrupt Controller – Sequential Interrupts When an interrupt nesting is enabled (or NSTDIS (INTCON1<15>) bit is ‘0’), the following sequence of events will lead to an address error trap. The generic terms “Interrupt 1” and “Interrupt 2” are used to represent any two enabled dsPIC30F interrupts ...

Page 9

... In addition, a global variable can be used to keep track of bit 15, so that when an overflow or underflow condition is present on POSCNT, the variable will toggle bit 15. Example 12 shows the code required for this global variable. // Instead of 0xFFFF // Clear QEI interrupt flag // x=2 for dsPIC30F // x=3 for dsPIC33F dsPIC30F2010 DS80186J-page 9 ...

Page 10

... GotoSleep( ) function call. This ensures that the device continues executing the correct code sequence after waking up from Sleep mode. Example 13 demonstrates the work around described above would apply to a dsPIC30F2010 device. ; Ensure flag is reset ; Return from Interrupt Service Routine the function ...

Page 11

... Manual” (DS70046) for more details on performing a clock switch operation. Note: The above work around is recommended for users for whom application hardware changes are possible, and also for users whose includes a 32 kHz LP Oscillator crystal. dsPIC30F2010 or Section 29. “Oscillator” application hardware already ...

Page 12

... Module When the I C module is configured as a slave, either in single-master or multi-master mode, the receiver buffer is filled whether a valid slave address is detected or not. Therefore receiver overflow condition occurs and this condition is indicated by the I2COV flag in the I2CSTAT register. This overflow condition inhibits the ability to set the ...

Page 13

... None. 23. Module: FRC Internal FRC accuracy is outside the specification documented in “Electrical Characteristics”, Table 22-17 “AC Characteristics: Internal RC Accuracy” of the “dsPIC30F2010 Data Sheet” (DS70118). The actual internal FRC accuracy is: • ±4% for 25°C • ±5% for -40°C and 85°C • ...

Page 14

... Module: PSV Operations An address error trap occurs in certain addressing modes when accessing the first four bytes of an PSV page. This only occurs when using the following addressing modes: • MOV.D • Register Indirect Addressing (word or byte mode) with pre/post-decrement Work around Do not perform PSV accesses to any of the first four bytes using the above addressing modes ...

Page 15

... Port Pin Multiplexed with IC1), and 24 (FRC). Revision H (5/2008) 2 Added silicon issues 25 and 26 (I C), and 27 (Timer). Revision J (9/2008) 2 Replaced issues 20 and with issue 30 (I Added silicon issues 26 (PLL Lock Status Bit), 27 (PSV 2 Operations) and 28-30 (I C). © 2008 Microchip Technology Inc. Removed 2 C), 22 (Motor 2 C). dsPIC30F2010 DS80186J-page 15 ...

Page 16

... NOTES: DS80186J-page 16 © 2008 Microchip Technology Inc. ...

Page 17

... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 18

... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...

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