AT90CAN128-16MI Atmel, AT90CAN128-16MI Datasheet - Page 163
![IC MCU AVR FLASH 128K 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
AT90CAN128-16MI
Manufacturer Part Number
AT90CAN128-16MI
Description
IC MCU AVR FLASH 128K 64-QFN
Manufacturer
Atmel
Series
AVR® 90CANr
Specifications of AT90CAN128-16MI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
For Use With
ATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT90CAN128-16MI
Manufacturer:
ATMEL
Quantity:
430
Company:
Part Number:
AT90CAN128-16MI
Manufacturer:
ATMEL
Quantity:
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14.11 Timer/Counter2 Prescaler
7679H–CAN–08/08
• Bit 7..2 – Reserved Bits
These bits are reserved for future use.
• Bit 1 – OCF2A: Output Compare Flag 2 A
The OCF2A bit is set (one) when a compare match occurs between the Timer/Counter2 and the
data in OCR2A – Output Compare Register2. OCF2A is cleared by hardware when executing
the corresponding interrupt handling vector. Alternatively, OCF2A is cleared by writing a logic
one to the flag. When the I-bit in SREG, OCIE2 (Timer/Counter2 Compare match Interrupt
Enable), and OCF2A are set (one), the Timer/Counter2 Compare match Interrupt is executed.
• Bit 0 – TOV2: Timer/Counter2 Overflow Flag
The TOV2 bit is set (one) when an overflow occurs in Timer/Counter2. TOV2 is cleared by hard-
ware when executing the corresponding interrupt handling vector. Alternatively, TOV2 is cleared
by writing a logic one to the flag. When the SREG I-bit, TOIE2A (Timer/Counter2 Overflow Inter-
rupt Enable), and TOV2 are set (one), the Timer/Counter2 Overflow interrupt is executed. In
PWM mode, this bit is set when Timer/Counter2 changes counting direction at 0x00.
Figure 14-13. Prescaler for Timer/Counter2
The clock source for Timer/Counter2 is named clk
system I/O clock clk
clocked from the TOSC oscillator or TOSC1 pin. This enables use of Timer/Counter2 as a Real
Time Counter (RTC).
A crystal can then be connected between the TOSC1 and TOSC2 pins to serve as an indepen-
dent clock source for Timer/Counter2. The Oscillator is optimized for use with a 32.768 kHz
crystal. Setting AS2 and resetting EXCLK enables the TOSC oscillator.
TOSC2
TOSC1
AS2
IO
. By setting the AS2 bit in ASSR, Timer/Counter2 is asynchronously
Oscillator
32 kHz
Enable
EXCLK
PSR2
CS20
CS21
CS22
EXCLK
clk
0
1
I/O
AS2
0
1
clk
T2S
T2S
. clk
Clear
T2S
AT90CAN32/64/128
TIMER/COUNTER2 CLOCK SOURCE
is by default connected to the main
0
10-BIT T/C PRESCALER
clk
T2
163
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