AT90CAN128-16MI Atmel, AT90CAN128-16MI Datasheet - Page 262
![IC MCU AVR FLASH 128K 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
AT90CAN128-16MI
Manufacturer Part Number
AT90CAN128-16MI
Description
IC MCU AVR FLASH 128K 64-QFN
Manufacturer
Atmel
Series
AVR® 90CANr
Specifications of AT90CAN128-16MI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
For Use With
ATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
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Price
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Part Number:
AT90CAN128-16MI
Manufacturer:
ATMEL
Quantity:
430
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AT90CAN128-16MI
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19.11.2
262
AT90CAN32/64/128
CAN MOb Control and DLC Register - CANCDMOB
The rising of this flag does not disable the MOb (the corresponding ENMOB-bit of CANEN regis-
ters is not cleared). The next matching frame will update the BERR flag.
• Bit 3 – SERR: Stuff Error
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
Detection of more than five consecutive bits with the same polarity. This flag can generate an
interrupt.
The rising of this flag does not disable the MOb (the corresponding ENMOB-bit of CANEN regis-
ters is not cleared). The next matching frame will update the SERR flag.
• Bit 2 – CERR: CRC Error
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The receiver performs a CRC check on every de-stuffed received message from the start of
frame up to the data field. If this checking does not match with the de-stuffed CRC field, a CRC
error is set.
The rising of this flag does not disable the MOb (the corresponding ENMOB-bit of CANEN regis-
ters is not cleared). The next matching frame will update the CERR flag.
• Bit 1 – FERR: Form Error
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The form error results from one or more violations of the fixed form in the following bit fields:
The rising of this flag does not disable the MOb (the corresponding ENMOB-bit of CANEN regis-
ters is not cleared). The next matching frame will update the FERR flag.
• Bit 0 – AERR: Acknowledgment Error
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
No detection of the dominant bit in the acknowledge slot.
The rising of this flag does not disable the MOb (the corresponding ENMOB-bit of CANEN regis-
ters is not cleared). The next matching frame will update the AERR flag.
• Bit 7:6 – CONMOB1:0: Configuration of Message Object
These bits set the communication to be performed (no initial value after RESET).
• CRC delimiter.
• Acknowledgment delimiter.
• EOF
Initial Value
Read/Write
Bit
CONMOB1 CONMOB0
R/W
7
-
R/W
6
-
RPLV
R/W
5
-
R/W
IDE
4
-
DLC3
R/W
3
-
DLC2
R/W
2
-
DLC1
R/W
1
-
DLC0
R/W
0
-
CANCDMOB
7679H–CAN–08/08
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