AT80C51SND1C-ROTIL Atmel, AT80C51SND1C-ROTIL Datasheet - Page 122

• Manufacturer Part Number: AT80C51SND1C-ROTIL
• Description: IC MCU FLASH MP3 DECODER 80-TQFP
• Manufacturer: Atmel
• Series: 80Cr

Specifications of AT80C51SND1C-ROTIL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 44
• Program Memory Type: ROMless
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: AT80C51SND1CROTIL

16.6.4.3
Figure 16-19. Data Stream Reception Flows
122
AT8xC51SND1C
Data Reading
read 8 data from MMDAT
a. Polling mode
STOP Command
F1FI or F2FI = 1?
Data Stream
FIFO Reading
No More Data
To Receive?
Reception
FIFO Full?
Send
may reset the data controller and its internal state machine by setting and clearing the DCR bit in
MMCON2 register.
This time-out may be disarmed after receiving 8 data (F1FI flag set) or after receiving end of
frame (EOFI flag set) in case of block length less than 8 data (1, 2 or 4).
Data is read from the FIFO by reading to MMDAT register. Each time one FIFO becomes full
(F1FI or F2FI set), user is requested to flush this FIFO by reading 8 data.
Unmask FIFOs Full
Data Stream
Initialization
F1FM = 0
F2FM = 0
b. Interrupt mode
read 8 data from MMDAT
STOP Command
F1FI or F2FI = 1?
Reception ISR
Mask FIFOs Full
Data Stream
FIFO Reading
No More Data
To Receive?
FIFO Full?
F1FM = 1
F2FM = 1
Send
4109L–8051–02/08