AT80C51SND1C-ROTIL Atmel, AT80C51SND1C-ROTIL Datasheet - Page 154
AT80C51SND1C-ROTIL
Manufacturer Part Number
AT80C51SND1C-ROTIL
Description
IC MCU FLASH MP3 DECODER 80-TQFP
Manufacturer
Atmel
Series
80Cr
Datasheet
1.AT80C51SND1C-ROTIL.pdf
(213 pages)
Specifications of AT80C51SND1C-ROTIL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
44
Program Memory Type
ROMless
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
AT80C51SND1CROTIL
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19.3.6
154
AT8xC51SND1C
Slave Mode with Polling Policy
Figure 19-10. Master SPI Interrupt Flows
Figure 19-11 shows the initialization phase and the transfer phase flows using the polling.
The transfer format depends on the master controller.
SPIF flag is cleared when reading SPDAT (SPSTA has been read before by the “end of recep-
tion” check).
This provides the fastest effective transmission and is well adapted when communicating at high
speed with other Microcontrollers. However, the process may then be interrupted at any time by
higher priority tasks.
program CPOL & CPHA
Select Master Mode
write data in SPDAT
SPI Initialization
Interrupt Policy
Enable interrupt
program SPR2:0
Select Bit Rate
Select Format
Start Transfer
Select Slave
Enable SPI
MSTR = 1
SPEN = 1
ESPI =1
Pn.x = L
write data in SPDAT
Start New Transfer
Service Routine
Get Data Received
Disable interrupt
Last Transfer?
Deselect Slave
SPI Interrupt
Read SPSTA
Read Status
read SPDAT
SPIE = 0
Pn.x = H
4109L–8051–02/08
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