AT80C51SND1C-ROTIL Atmel, AT80C51SND1C-ROTIL Datasheet - Page 157

• Manufacturer Part Number: AT80C51SND1C-ROTIL
• Description: IC MCU FLASH MP3 DECODER 80-TQFP
• Manufacturer: Atmel
• Series: 80Cr

Specifications of AT80C51SND1C-ROTIL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 44
• Program Memory Type: ROMless
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: AT80C51SND1CROTIL

4109L–8051–02/08
Reset Value = 0001 0100b
Note:
Table 134. SPSTA Register
SPSTA (S:C4h) – SPI Status Register
Reset Value = 00000 0000b
Table 135. SPDAT Register
SPDAT (S:C5h) – Synchronous Serial Data Register
Reset Value = XXXX XXXXb
1. When the SPI is disabled, SCK outputs high level.
Number
Number
Number
SPD7
SPIF
1 - 0
3 - 0
7 - 0
Bit
Bit
Bit
7
7
6
5
4
7
Mnemonic Description
Mnemonic Description
Mnemonic Description
SPR1:0
SPD7:0
WCOL
WCOL
MODF
SPD6
SPIF
Bit
Bit
Bit
6
6
-
-
SPI Rate Bits 0 and 1
Refer to Table 132 for bit rate description.
SPI Interrupt Flag
Set by hardware when an 8-bit shift is completed.
Cleared by hardware when reading or writing SPDAT after reading SPSTA.
Write Collision Flag
Set by hardware to indicate that a collision has been detected.
Cleared by hardware to indicate that no collision has been detected.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Mode Fault
Set by hardware to indicate that the SS pin is at an appropriate level.
Cleared by hardware to indicate that the SS pin is at an inappropriate level.
Reserved
The value read from these bits is indeterminate. Do not set these bits.
Synchronous Serial Data.
SPD5
5
5
-
MODF
SPD4
4
4
SPD3
3
3
-
AT8xC51SND1C
SPD2
2
2
-
SPD1
1
1
-
SPD0
0
0
-
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