ATMEGA3290-16AI Atmel, ATMEGA3290-16AI Datasheet - Page 165

IC AVR MCU 32K 16MHZ 100TQFP

ATMEGA3290-16AI

Manufacturer Part Number
ATMEGA3290-16AI
Description
IC AVR MCU 32K 16MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA3290-16AI

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK504 - STARTER KIT AVR EXP MOD 100P LCD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA3290-16AI
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA3290-16AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
18.5
18.5.1
2552K–AVR–04/11
Register Description
SPCR – SPI Control Register
Figure 18-4. SPI Transfer Format with CPHA = 1
• Bit 7 – SPIE: SPI Interrupt Enable
This bit causes the SPI interrupt to be executed if SPIF bit in the SPSR Register is set and the if
the Global Interrupt Enable bit in SREG is set.
• Bit 6 – SPE: SPI Enable
When the SPE bit is written to one, the SPI is enabled. This bit must be set to enable any SPI
operations.
• Bit 5 – DORD: Data Order
When the DORD bit is written to one, the LSB of the data word is transmitted first.
When the DORD bit is written to zero, the MSB of the data word is transmitted first.
• Bit 4 – MSTR: Master/Slave Select
This bit selects Master SPI mode when written to one, and Slave SPI mode when written logic
zero. If SS is configured as an input and is driven low while MSTR is set, MSTR will be cleared,
and SPIF in SPSR will become set. The user will then have to set MSTR to re-enable SPI Mas-
ter mode.
Bit
0x2C (0x4C)
Read/Write
Initial Value
SCK (CPOL = 0)
mode 1
SCK (CPOL = 1)
mode 3
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SS
MSB first (DORD = 0)
LSB first (DORD = 1)
SPIE
R/W
7
0
SPE
R/W
6
0
DORD
MSB
LSB
R/W
5
0
Bit 6
Bit 1
MSTR
R/W
4
0
ATmega329/3290/649/6490
Bit 5
Bit 2
CPOL
R/W
3
0
Bit 4
Bit 3
CPHA
R/W
2
0
Bit 3
Bit 4
SPR1
R/W
1
0
Bit 2
Bit 5
SPR0
R/W
0
0
Bit 1
Bit 6
SPCR
LSB
MSB
165

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