ATMEGA2560-16AI Atmel, ATMEGA2560-16AI Datasheet - Page 156
ATMEGA2560-16AI
Manufacturer Part Number
ATMEGA2560-16AI
Description
IC AVR MCU 256K 16MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA2560-16AI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK503 - STARTER KIT AVR EXP MODULE 100P
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA2560-16AI
Manufacturer:
ATMEL
Quantity:
1 000
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16.10 Timer/Counter Timing Diagrams
2549M–AVR–09/10
The extreme values for the OCRnx Register represents special cases when generating a PWM
waveform output in the phase correct PWM mode. If the OCRnx is set equal to BOTTOM the
output will be continuously low and if set equal to TOP the output will be set to high for non-
inverted PWM mode. For inverted PWM the output will have the opposite logic values. If OCR1A
is used to define the TOP value (WGM13:0 = 9) and COM1A1:0 = 1, the OC1A output will toggle
with a 50% duty cycle.
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when Interrupt
Flags are set, and when the OCRnx Register is updated with the OCRnx buffer value (only for
modes utilizing double buffering).
Figure 16-10. Timer/Counter Timing Diagram, Setting of OCFnx, no Prescaling
Figure 16-11
Figure 16-11. Timer/Counter Timing Diagram, Setting of OCFnx, with Prescaler (f
TCNTn
OCRnx
OCFnx
TCNTn
OCRnx
(clk
OCFnx
(clk
clk
clk
clk
clk
I/O
I/O
I/O
Tn
I/O
Tn
/1)
/8)
shows the same timing data, but with the prescaler enabled.
OCRnx - 1
OCRnx - 1
ATmega640/1280/1281/2560/2561
Figure 16-10
OCRnx
OCRnx
OCRnx Value
OCRnx Value
shows a timing diagram for the setting of OCFnx.
OCRnx + 1
OCRnx + 1
Tn
) is therefore shown as a
OCRnx + 2
OCRnx + 2
clk_I/O
/8)
156
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