ACE1202LEM8X Fairchild Semiconductor, ACE1202LEM8X Datasheet
ACE1202LEM8X
Specifications of ACE1202LEM8X
Related parts for ACE1202LEM8X
ACE1202LEM8X Summary of contents
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... Decoupling capacitor recommended 2. Available only in the 14-pin package option 3. Available only on the ACE1202-2 device © 2001 Fairchild Semiconductor Corporation ACE1202 Product Family Rev. B.1 I Hardware Bit - Coder (HBC) (ACE1202-2 only) I On-chip oscillator — No external components — 1µs instruction cycle time ...
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Optional LED ACE1202 Product Family Rev. B ...
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Ambient Storage Temperature Input Voltage not including G3 G3 Input Voltage Lead Temperature (10s max) Electrostatic Discharge on all pins ACE1202 ACE12022 ACE1202E ACE12022E ACE1202V ACE1202B ACE12022B ACE1202BE ACE12022BE ACE1202BV ACE12022BV ACE1202L ACE1202 Product Family Rev. B.1 -65°C to +150°C ...
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V = 1.8/2.2/2.7 to 5.5V CC All measurements valid for ambient operating temperature range unless otherwise stated Supply Current – data EEPROM write in progress I HALT Mode current CCH 5 I IDLE Mode Current CCL ...
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V = 1.8/2.2/2.7 to 5.5V CC All measurements valid for ambient operating temperature range unless otherwise stated. Instruction cycle time from internal clock - setpoint Internal clock voltage dependent frequency variation Internal clock temperature dependent frequency variation Internal clock frequency ...
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V = 2.2/1.8 to 5.5V CC The following characteristics are guaranteed by design but are not 100% tested. LBD Voltage Threshold V = 2.2 to 5.5V CC The following characteristics are guaranteed by design but are not 100% tested. BOR ...
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ACE1202 Product Family Rev. B.1 5.6k/100pF 6.8K/100pF 5.6k/100pF 6.8K/100pF ° Avg Min Max Avg Min Max www.fairchildsemi.com ...
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BATT min BATT t S min t S actual t S max S VCC ACE1202 Product Family Rev. B actual S max Supply Voltage Battery Voltage (Nominal Operating ...
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ACE1202 Product Family Rev. B.1 ° ° www.fairchildsemi.com ...
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ACE1202 Product Family Rev. B.1 ° www.fairchildsemi.com ...
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ACE1202 Product Family Rev. B.1 ° www.fairchildsemi.com ...
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The ACEx microcontroller core is specifically designed for low cost applications involving bit manipulation, shifting and block encryption.It is based on a modified Harvard architecture meaning peripheral, I/O, and RAM locations are addressed separately from instruction data. The core differs ...
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The Accumulator is a general-purpose 8-bit register that is used to hold data and results of arithmetic calculations or data manipulations. The X-Pointer register allows for a 12-bit indexing value to be added to an 8-bit offset creating an effective ...
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The ACEx microcontroller is capable of supporting four interrupts. Three are maskable through the G bit of the SR and the fourth (software interrupt) is not inhibited by the G bit (see Figure 13). The software interrupt instruction is generated ...
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M ACE1202 Product Family Rev. B ...
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ADC A, [X] 1 ADC ADC ADD A, [X] 1 ADD ADD AND AND AND A, [X] 1 CLR X 1 CLR ...
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All I/O ports, peripheral registers and core registers, except the accumulator and the program counter are mapped into memory space. 0x00 - 0x3F Data 0x40 - 0x7F Data 0xA0 Data 0xA1 Data 0xA2 Data 0xA3 Data 0xA4 Data 0xA9 Data ...
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The ACEx microcontroller device has 64 bytes of SRAM and 64 bytes of EEPROM available for data storage. The device also has 2K bytes of EEPROM for program storage. Software can read and write to SRAM and data EEPROM but ...
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Timer versatile 16-bit timer that can operate in one of four modes: • (PWM) mode, which generates pulses of a specified width and duty cycle • mode, which counts occurrences of an external event • mode, which ...
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In the PWM mode, the timer counts down at the instruction clock rate. When an underflow occurs, the timer register is reloaded from T1RA and the count down proceeds from the loaded value. At every underflow, a pending flag (T1PND) ...
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The External Event Counter mode operates similarly to the PWM mode; however, the timer is not clocked by the instruction clock but by transitions of the T1 input signal. The edge is selectable through the T1C1 bit of the T1CNTRL ...
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In the Input Capture mode, the timer is used to measure elapsed time between edges of an input signal. Once the timer is configured for this mode, the timer starts counting down immediately at the instruction clock rate. The Timer ...
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The Difference Input Capture mode works similarly to the stan- dard Input Capture mode. However, for the Difference Input Capture the timer automatically captures the elapsed time be- tween the selected edges without the core needing to perform the calculation. ...
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Timer 12-bit free running idle timer. Upon power-up or any reset, the timer is reset to 0x000 and then counts up continuously based on the instruction clock of 1MHz (1 µs). Software cannot read from or write ...
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The ACE1202-2 contains a dedicated hardware bit-encoding peripheral block, Hardware Bit-Coder (HBC), for IR/RF data transmission (see Figure 21.) The HBC is completely software programmable and can be configured to emulate various bit- encoding formats. The software developer has the ...
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After the HBC has started, software must then poll the OCFLAG for a high pulse and restore the DAT0 register and the START signal to continue with the next data transmission. LOOP_HI: IFBIT OCFLAG, HBCNTRL ; Wait for OCFLAG = ...
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Condition: BPSEL = 0x12 [ "1", " 0 " IR/RF Clocks] DAT0 = 0x52 No. bit to encode = 8 (HBCNTRL = XXXX0111b) TXBUSY ShiftCLK OCFLAG SYNC Period Bit 7 "0" DAT0 G2/G5 Output IR/RF CLOCK Conditions: ...
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The Multi-Input Wakeup (MIW)/Interrupt contains three memory-mapped registers associated with this circuit: WKEDG (Wakeup Edge), WKEN (Wakeup Enable), and WKPND (Wakeup Pending). Each register has 8-bits with each bit corresponding to an input pins as shown in Figure 26. All ...
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The eight I/O pins (six on 8-pin package option) are bi-directional (see Figure 28) with the exception of G3 which is always an input with weak pull-up. The bi-directional I/O pins can be individually configured by software to operate as ...
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The ACEx microcontroller supports in-circuit programming of the internal data EEPROM, code EEPROM, and the initialization registers. An externally controlled four wire interface consisting of a LOAD control pin (G3), a serial data SHIFT-IN input pin (G4), a serial data ...
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SV1 SV2 LOAD (G3) enter prog. mode CLOCK (G1) SHIFT_IN (G4) bit 31 SHIFT_OUT (G2) (in write mode) SHIFT_OUT (G2) (in read mode) A: start of programming cycle CLOCK (G1) SHIFT_IN (G4) SHIFT_OUT (G2) ACE1202 Product Family ...
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The Brown-out Reset (BOR) and Low Battery Detect (LBD) circuits on the ACEx microcontroller have been designed to offer two types of voltage reference comparators. The sections below will describe the functionality of both circuits. Vcc 1. 2.2V ...
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When a RESET sequence is initiated, all I/O registers will be reset setting all I/Os to high-impedence inputs. The system clock is restarted after the required clock start-up delay. A reset is gener- ated by any one of the following ...
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The HALT mode is a power saving feature that almost completely shuts down the device for current conservation. The device is placed into HALT mode by setting the HALT enable bit (EHALT) of the HALT register through software ...
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Part Number Core Type Max ACE1202M8 X X ACE1202M8X X X ACE1202M X X ACE1202MX X X ACE1202N X X ACE1202N14 X X ACE1202EM8 X X ACE1202EM8X X X ACE1202EM X X ACE1202EMX X ...
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Part Number Core Type Max ACE12022M8 X X ACE12022M8X X X ACE12022M X X ACE12022MX X X ACE12022N X X ACE12022N14 X X ACE12022EM8 X X ACE12022EM8X X X ACE12022EM X X ACE12022EMX X ...
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All lead tips Typ. All Leads 0.280 MIN (7.112) 0.300 - 0.320 (7.62 ...
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All lead tips (0.203 - 0.254) Typ. all leads ACE1202 Product Family Rev. B ...
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... Fairchild's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of Fairchild Semiconductor Corporation. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support ...