ATTINY44-20SSU Atmel, ATTINY44-20SSU Datasheet - Page 120
ATTINY44-20SSU
Manufacturer Part Number
ATTINY44-20SSU
Description
IC MCU AVR 4K FLASH 20MHZ 14SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY44-20SSU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Cpu Family
ATtiny
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/USI
Total Internal Ram Size
256Byte
# I/os (max)
12
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
14
Package Type
SOIC
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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ATtiny24/44/84
The code is size optimized using only eight instructions (plus return). The code example
assumes that the DO and USCK pins have been enabled as outputs in DDRA. The value stored
in register r16 prior to the function is called is transferred to the slave device, and when the
transfer is completed the data received from the slave is stored back into the register r16.
The second and third instructions clear the USI Counter Overflow Flag and the USI counter
value. The fourth and fifth instructions set three-wire mode, positive edge clock, count at USITC
strobe, and toggle USCK. The loop is repeated 16 times.
The following code demonstrates how to use the USI as an SPI master with maximum speed
(f
SCK
SPITransfer_loop:
SPITransfer_Fast:
ret
= f
CK
out
in
sbrs
rjmp
in
ret
out
ldi
ldi
out
out
out
out
out
out
out
out
out
out
out
out
out
out
out
out
in
/2):
USICR,r17
r16, USISR
r16, USIOIF
SPITransfer_loop
r16,USIDR
USIDR,r16
r16,(1<<USIWM0)|(0<<USICS0)|(1<<USITC)
r17,(1<<USIWM0)|(0<<USICS0)|(1<<USITC)|(1<<USICLK)
USICR,r16 ; MSB
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16 ; LSB
USICR,r17
r16,USIDR
8006K–AVR–10/10
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