ATMEGA169P-16MCU Atmel, ATMEGA169P-16MCU Datasheet - Page 164

• Manufacturer Part Number: ATMEGA169P-16MCU
• Description: MCU AVR 16K ISP FLSH 16MHZ 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169P-16MCU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• For Use With: ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.4
8018P–AVR–08/10
Data Modes
There are four combinations of SCK phase and polarity with respect to serial data, which are
determined by control bits CPHA and CPOL. The SPI data transfer formats are shown in
18-3
nal, ensuring sufficient time for data signals to stabilize. This is clearly seen by summarizing
Table 18-3 on page 165
Table 18-2.
Figure 18-3. SPI Transfer Format with CPHA = 0
Figure 18-4. SPI Transfer Format with CPHA = 1
and
CPOL=0, CPHA=0
CPOL=0, CPHA=1
CPOL=1, CPHA=0
CPOL=1, CPHA=1
Figure
SCK (CPOL = 0)
mode 0
SCK (CPOL = 1)
mode 2
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SCK (CPOL = 0)
mode 1
SCK (CPOL = 1)
mode 3
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SS
SS
MSB first (DORD = 0)
LSB first (DORD = 1)
MSB first (DORD = 0)
LSB first (DORD = 1)
CPOL Functionality
18-4. Data bits are shifted out and latched in on opposite edges of the SCK sig-
and
MSB
LSB
Table 18-4 on page
MSB
LSB
Sample (Falling)
Sample (Rising)
Leading Edge
Setup (Falling)
Setup (Rising)
Bit 6
Bit 1
Bit 6
Bit 1
Bit 5
Bit 2
Bit 5
Bit 2
165, as done below:
Bit 4
Bit 3
Bit 4
Bit 3
Bit 3
Bit 4
Sample (Falling)
Sample (Rising)
Setup (Falling)
Setup (Rising)
Trailing eDge
Bit 3
Bit 4
Bit 2
Bit 5
Bit 2
Bit 5
ATmega169P
Bit 1
Bit 6
Bit 1
Bit 6
LSB
MSB
LSB
MSB
SPI Mode
0
1
2
3
Figure
164