EP9301-CQ Cirrus Logic Inc, EP9301-CQ Datasheet - Page 261
![IC ARM920T MCU 166MHZ 208-LQFP](/photos/12/23/122383/mfg_ep9301_parts_sml.jpg)
EP9301-CQ
Manufacturer Part Number
EP9301-CQ
Description
IC ARM920T MCU 166MHZ 208-LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EDB9301.pdf
(5 pages)
2.EDB9301.pdf
(4 pages)
3.EP9307-CRZ.pdf
(824 pages)
4.EP9301-IQ.pdf
(41 pages)
Specifications of EP9301-CQ
Core Processor
ARM9
Core Size
16/32-Bit
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
598-1248
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9301-CQZ
Manufacturer:
CIRRUS
Quantity:
3 390
Part Number:
EP9301-CQZ
Manufacturer:
CIRRUSLOGIC
Quantity:
20 000
Company:
Part Number:
EP9301-CQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
- EDB9301 PDF datasheet
- EDB9301 PDF datasheet #2
- EP9307-CRZ PDF datasheet #3
- EP9301-IQ PDF datasheet #4
- Current page: 261 of 824
- Download datasheet (13Mb)
VSigStrtStop
DS785UM1
31
15
Address: 0x8003_0208
Default: 0x0000_0000
Definition: Vertical Signature Bounds Start/Stop register
30
14
RSVD
RSVD
29
13
28
12
CLKEN:
BLANK:
HSYNC:
VSYNC:
PEN:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Clock Enable - Read/Write
Writing a ‘1’ to this bit enables the CLKEN control for
calculation in the video signature.
Writing a ‘0’ to this bit disables the CLKEN control for
calculation in the video signature.
Blank - Read/Write
Writing a ‘1’ to this bit enables the BLANK output for
calculation in the video signature.
Writing a ‘0’ to this bit disables the BLANK output for
calculation in the video signature.
Horizontal Synchronization - Read/Write
Writing a ‘1’ to this bit enables the HSYNC output for
calculation in the video signature.
Writing a ‘0’ to this bit disables the HSYNC output for
calculation in the video signature.
Vertical Synchronization - Read/Write
Writing a ‘1’ to this bit enables the VSYNC output for
calculation in the video signature.
Writing a ‘0’ to this bit disables the VSYNC output for
calculation in the video signature.
Pixel Bits Enable - Read/Write
Writing ‘1’s to these bits enables respective pixel bits for
calculation in the video signature.
Writing ‘0’s to these bits disables respective pixel bits for
calculation in the video signature.
Raster Engine With Analog/LCD Integrated Timing and Interface
24
8
23
7
22
6
STOP
STRT
21
5
20
4
19
3
EP93xx User’s Guide
18
2
17
1
16
7-79
0
7
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