Z8F0812SJ020EC Zilog, Z8F0812SJ020EC Datasheet - Page 94
Z8F0812SJ020EC
Manufacturer Part Number
Z8F0812SJ020EC
Description
IC ENCORE MCU FLASH 8K 28SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F08200100KIT.pdf
(264 pages)
Specifications of Z8F0812SJ020EC
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
269-3228
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Table 46. Timer 0–1 Control Register (TxCTL)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
Timer 0–1 Control 1 Registers
TEN
7
The Timer 0–1 Control (TxCTL) registers enable/disable the timers, set the prescaler
value, and determine the timer operating mode.
TEN—Timer Enable
0 = Timer is disabled.
1 = Timer enabled to count.
TPOL—Timer Input/Output Polarity
Operation of this bit is a function of the current operating mode of the timer.
ONE-SHOT Mode
When the timer is disabled, the Timer Output signal is set to the value of this bit.
When the timer is enabled, the Timer Output signal is complemented upon timer Reload.
CONTINUOUS Mode
When the timer is disabled, the Timer Output signal is set to the value of this bit. When the
timer is enabled, the Timer Output signal is complemented upon timer Reload.
COUNTER Mode
If the timer is enabled the Timer Output signal is complemented after timer reload.
0 = Count occurs on the rising edge of the Timer Input signal.
1 = Count occurs on the falling edge of the Timer Input signal.
PWM Mode
0 = Timer Output is forced Low (0) when the timer is disabled. When enabled,
1 = Timer Output is forced High (1) when the timer is disabled. When enabled,
CAPTURE Mode
0 = Count is captured on the rising edge of the Timer Input signal.
1 = Count is captured on the falling edge of the Timer Input signal.
the Timer Output is forced High (1) upon PWM count match and forced
Low (0) upon Reload.
the Timer Output is forced Low (0) upon PWM count match and forced
High (1) upon Reload.
TPOL
6
5
PRES
4
F07H, F0FH
R/W
0
3
Z8 Encore! XP
2
Product Specification
TMODE
1
®
F0822 Series
0
Timers
81
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