ST92F250CV2QB STMicroelectronics, ST92F250CV2QB Datasheet - Page 96
ST92F250CV2QB
Manufacturer Part Number
ST92F250CV2QB
Description
IC MCU 256K FLASH 100-PQFP
Manufacturer
STMicroelectronics
Series
ST9r
Datasheet
1.ST92F150CV1TB.pdf
(429 pages)
Specifications of ST92F250CV2QB
Core Processor
ST9
Core Size
8/16-Bit
Speed
24MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-QFP
Processor Series
ST92F25x
Core
ST9
Data Bus Width
8 bit, 16 bit
Data Ram Size
8 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
80
Number Of Timers
5 x 16 bit
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST92F150-EPB
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Case
QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2139
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST92F250CV2QB
Manufacturer:
HKE
Quantity:
30 000
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ST92F124/F150/F250 - INTERRUPTS
ARBITRATION MODES (Cont’d)
Examples
In the following two examples, three interrupt re-
quests with different priority levels (2, 3 & 4) occur
simultaneously during the interrupt 5 service rou-
tine.
Figure 46. Simple Example of a Sequence of Interrupt Requests with:
- Concurrent mode selected and
- IEN unchanged by the interrupt routines
96/429
9
0
1
2
3
4
5
6
7
CPL is set to 7
Priority Level of
Interrupt Request
MAIN
INT 5
ei
CPL = 7
INT 5
INT 2
INT 3
INT 4
CPL = 7
INT 2
CPL = 7
INT 3
CPL = 7
Example 1
In the first example, (simplest case,
ei instruction is not used within the interrupt serv-
ice routines. This means that no new interrupt can
be serviced in the middle of the current one. The
interrupt routines will thus be serviced one after
another, in the order of their priority, until the main
program eventually resumes.
INT 4
CPL = 7
MAIN
INTERRUPT 2 HAS PRIORITY LEVEL 2
INTERRUPT 3 HAS PRIORITY LEVEL 3
INTERRUPT 4 HAS PRIORITY LEVEL 4
INTERRUPT 5 HAS PRIORITY LEVEL 5
Figure
46) the
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