MC68HC908GT8CFB Freescale Semiconductor, MC68HC908GT8CFB Datasheet - Page 45

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MC68HC908GT8CFB

Manufacturer Part Number
MC68HC908GT8CFB
Description
IC MCU 8K FLASH 8MHZ 44-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GT8CFB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
34
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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2.6.6 Flash Block Protection
Due to the ability of the on-board charge pump to erase and program the Flash memory in the target
application, provision is made for protecting a block of memory from unintentional erase or program
operations due to system malfunction. This protection is done by using of a Flash block protect register
(FLBPR). The FLBPR determines the range of the Flash memory which is to be protected. The range of
the protected area starts from a location defined by FLBPR and ends at the bottom of the Flash memory
($FFFF). When the memory is protected, the HVEN bit cannot be set in either ERASE or PROGRAM
operations.
When the FLBPR is program with all 0’s, the entire memory is protected from being programmed and
erased. When all the bits are erased (all 1’s), the entire memory is accessible for program and erase.
When bits within the FLBPR are programmed, they lock a block of memory, address ranges as shown in
2.6.7 Flash Block Protect
any erase or program of the FLBPR or the protected block of Flash memory is prohibited. Mass erase is
disabled whenever any block is protected (FLBPR does not equal $FF). The FLBPR itself can be erased
or programmed only with an external voltage, V
from reset into the monitor mode.
2.6.7 Flash Block Protect Register
The Flash block protect register (FLBPR) is implemented as a byte within the Flash memory, and
therefore can only be written during a programming sequence of the Flash memory. The value in this
register determines the starting location of the protected range within the Flash memory.
BPR[7:0] — Flash Block Protect Bits
Freescale Semiconductor
These eight bits represent bits [13:6] of a 16-bit memory address. Bit 15 and Bit 14 are 1s and bits [5:0]
are 0s.
The resultant 16-bit address is used for specifying the start address of the Flash memory for block
protection. The Flash is protected from this start address to the end of Flash memory, at $FFFF. With
this mechanism, the protect start address can be $XX00, $XX40, $XX80, and $XXC0 (64 bytes page
boundaries) within the Flash memory.
Address:
In performing a program or erase operation, the Flash block protect register
must be read after setting the PGM or ERASE bit and before asserting the
HVEN bit
Reset:
Read:
Write:
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
START ADDRESS OF FLASH
Write to this register is by a programming sequence to the Flash memory.
$FF7E
BPR7
Bit 7
Register. Once the FLBPR is programmed with a value other than $FF or $FE,
Figure 2-5. Flash Block Protect Register (FLBPR)
BLOCK PROTECT
Figure 2-6. Flash Block Protect Start Address
BPR6
6
Unaffected by reset. Initial value from factory is 1.
1
BPR5
5
1
TST
NOTE
, present on the IRQ pin. This voltage also allows entry
BPR4
FLBPR VALUE
4
16-BIT MEMORY ADDRESS
BPR3
3
BPR2
0 0 0 0 0 0
2
BPR1
1
BPR0
Bit 0
Flash Memory
45

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