MC68HC908GT8CFB Freescale Semiconductor, MC68HC908GT8CFB Datasheet - Page 5

• Manufacturer Part Number: MC68HC908GT8CFB
• Description: IC MCU 8K FLASH 8MHZ 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GT8CFB

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 34
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Revision History (Sheet 2 of 2)
Freescale Semiconductor
September,
March,
2004
2006
April,
2007
Date
(Continued
Revision
previous
Level
page)
from
3.0
4.0
5.0
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
Chapter 15 System Integration Module (SIM) — Clarified SIM features and
functionality
15.7.2 SIM Reset Status Register — Clarified SRSR operation
Table 19-1. Monitor Mode Signal Requirements and Options — Reworked
19.2.1 Functional Description — Corrected Break description
19.3 Monitor Module (MON) — Reworked
Chapter 20 Electrical Specifications — Revised/added tables:
20.20 Memory Characteristics — Updated memory table
Chapter 20 Electrical Specifications — Added figures:
Appendix A MC68HC08GT16 — Introduces the MC68HC08GT16, the ROM part
equivalent to the MC68HC908GT16.
4.2 Functional Description
corrected the values for COP timeout period
Figure 5-1. COP Block Diagram
14.9.1 ESCI Arbiter Control Register
definition for ACLK = 0
14.9.3 Bit Time Measurement
for ACLK = 0
Revised the following diagrams:
20.5 5.0-V DC Electrical Characteristics
20.6 3.0-V DC Electrical Characteristics
20.7 Supply Current Characteristics
20.8 5-V Control Timing
20.9 3-V Control Timing
Figure 20-1. RST and IRQ Timing
Figure 20-2. RST and IRQ Timing
Figure 19-10. Forced Monitor Mode (Low)
Figure 19-11. Forced Monitor Mode (High)
Figure 19-12. Standard Monitor Mode
— In the description of the COP Rate Select Bit
— Replaced one half with one quarter in definition
— Replaced BUSCLKX4 with COPCLK
Description
— Replaced one half with one quarter in
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