MC68HC908LJ12CFU Freescale Semiconductor, MC68HC908LJ12CFU Datasheet - Page 169

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MC68HC908LJ12CFU

Manufacturer Part Number
MC68HC908LJ12CFU
Description
IC MCU 12K FLASH 8MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908LJ12CFU

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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10.5 Security
MC68HC908LJ12
Freescale Semiconductor
NOTE:
Rev. 2.1
A security feature discourages unauthorized reading of FLASH locations
while in monitor mode. The host can bypass the security feature at
monitor mode entry by sending eight security bytes that match the bytes
at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-
defined data.
Do not leave locations $FFF6–$FFFD blank. For security reasons,
program locations $FFF6–$FFFD even if they are not used for vectors.
During monitor mode entry, the MCU waits after the power-on reset for
the host to send the eight security bytes on pin PTA0. If the received
bytes match those at locations $FFF6–$FFFD, the host bypasses the
security feature and can read all FLASH locations and execute code
from FLASH. Security remains bypassed until a power-on reset occurs.
If the reset was not a power-on reset, security remains bypassed and
security code entry is not required. (See
PTA0
RST
V
NOTES:
DD
1 = Echo delay, 2 bit times.
2 = Data return delay, 2 bit times.
4 = Wait 1 bit time before sending next byte.
FROM HOST
Figure 10-8. Monitor Mode Entry Timing
FROM MCU
Monitor ROM (MON)
4096 + 32 ICLK CYCLES
1
256 BUS CYCLES (MINIMUM)
4
1
Figure
10-8.)
1
Monitor ROM (MON)
2
Technical Data
4
1
169

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