MC68HC908LJ12CFU Freescale Semiconductor, MC68HC908LJ12CFU Datasheet - Page 312

• Manufacturer Part Number: MC68HC908LJ12CFU
• Description: IC MCU 12K FLASH 8MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908LJ12CFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Analog-to-Digital Converter (ADC)
15.8.2 ADC Data Register
Technical Data
312
Addr.
$003D
Addr.
$003D
$003E
$003E
ADC Data Register High
ADC Data Register High
ADC Data Register Low
ADC Data Register Low
Register Name
Register Name
Figure 15-5. ADRH and ADRL in 8-Bit Truncated Mode
(ADRH)
(ADRH)
(ADRL)
(ADRL)
Figure 15-6. ADRH and ADRL in Right Justified Mode
The ADC data register consist of a pair of 8-bit registers: high byte
(ADRH), and low byte (ADRL). This pair form a 16-bit register to store
the 10-bit ADC result for the selected ADC result justification mode.
In 8-bit truncated mode, the ADRL holds the eight most significant bits
(MSBs) of the 10-bit result. The ADRL is updated each time an ADC
conversion completes. In 8-bit truncated mode, ADRL contains no
interlocking with ADRH. (See
Truncated
In right justified mode the ADRH holds the two MSBs, and the ADRL
holds the eight least significant bits (LSBs), of the 10-bit result. ADRH
and ADRL are updated each time a single channel ADC conversion
completes. Reading ADRH latches the contents of ADRL. Until ADRL is
read all subsequent ADC results will be lost.
(See
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Figure 15-6 . ADRH and ADRL in Right Justified
Bit 7
Bit 7
AD9
AD7
Analog-to-Digital Converter (ADC)
R
R
R
R
0
0
0
0
0
0
Mode.)
AD8
AD6
R
R
R
R
6
0
0
0
6
0
0
0
AD7
AD5
R
R
R
R
5
0
0
0
5
0
0
0
Figure 15-5 . ADRH and ADRL in 8-Bit
AD6
AD4
R
R
R
R
4
0
0
0
4
0
0
0
AD5
AD3
R
R
R
R
3
0
0
0
3
0
0
0
MC68HC908LJ12
AD4
AD2
Freescale Semiconductor
R
R
R
R
0
0
0
0
0
0
2
2
Mode.)
AD3
AD9
AD1
R
R
R
R
1
0
0
0
1
0
0
—
Rev. 2.1
Bit 0
Bit 0
AD2
AD8
AD0
R
R
R
R
0
0
0
0
0