C8051F302 Silicon Laboratories Inc, C8051F302 Datasheet - Page 101

• Manufacturer Part Number: C8051F302
• Description: IC 8051 MCU 8K FLASH 11MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F30xr

Specifications of C8051F302

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 8
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 11-VQFN
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

12.3. General Purpose Port I/O
Port pins that remain unassigned by the Crossbar and are not used by analog peripherals can be used for general pur-
pose I/O. Port0 is accessed through a corresponding special function register (SFR) that is both byte addressable and
bit addressable. When writing to a Port, the value written to the SFR is latched to maintain the output data value at
each pin. When reading, the logic levels of the Port's input pins are returned regardless of the XBRn settings (i.e.,
even when the pin is assigned to another signal by the Crossbar, the Port register can always read its corresponding
Port I/O pin). The exception to this is the execution of the read-modify-write instructions. The read-modify-write
instructions when operating on a Port SFR are the following: ANL, ORL, XRL, JBC, CPL, INC, DEC, DJNZ and
MOV, CLR or SET, when the destination is an individual bit in a Port SFR. For these instructions, the value of the
register (not the pin) is read, modified, and written back to the SFR.
Bits7-0:
Bits7-0:
P0.7
R/W
R/W
Bit7
Bit7
P0.[7:0]
Write - Output appears on I/O pins per XBR0, XBR1, and XBR2 Registers
0: Logic Low Output.
1: Logic High Output (open-drain if corresponding P0MDOUT.n bit = 0)
Read - Always reads ‘1’ if selected as analog input in register P0MDIN. Directly reads Port pin when
configured as digital input.
0: P0.n pin is logic low.
1: P0.n pin is logic high.
Input Configuration Bits for P0.7-P0.0 (respectively)
Port pins configured as analog inputs have their weak pull-up, digital driver, and digital receiver dis-
abled.
0: Corresponding P0.n pin is configured as an analog input.
1: Corresponding P0.n pin is configured as a digital input.
P0.6
R/W
R/W
Bit6
Bit6
Figure 12.9. P0MDIN: Port0 Input Mode Register
P0.5
R/W
R/W
Bit5
Bit5
Figure 12.8. P0: Port0 Register
P0.4
R/W
R/W
Bit4
Bit4
P0.3
R/W
R/W
Bit3
Bit3
Rev. 2.3
P0.2
R/W
R/W
Bit2
Bit2
C8051F300/1/2/3/4/5
P0.1
R/W
R/W
Bit1
Bit1
(bit addressable)
P0.0
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
Reset Value
Reset Value
11111111
11111111
0xF1
0x80
101