HD6417760BP200QS Renesas Electronics America, HD6417760BP200QS Datasheet - Page 15

• Manufacturer Part Number: HD6417760BP200QS
• Description: IC SUPERH MCU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BP200QS

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Item
11.6.2 DMABRG
Reset
11.6.5 DMA Audio
Transmit Operation
Figure 11.32
Example of HAC DMA
Transfer Operation
Flow
11.6.11 LCDC DMA
Transfer
Figure 11.38 Example
of LCDC Data Transfer
Flow
12.3 Clock Operating
Modes
Table 12.2 Clock
Operating Modes
14.4 Usage Note
Page
468
471
478
491
531
Revision (See Manual for Details)
Description deleted
Do not access the registers of the HAC, SSI, USB, LCDC,
and DMAC (except for DMAPCR) while the BRGRST bit is 1.
Operation is not guaranteed when these registers are
accessed in this state.
Note: * Make sure to write 1 to the CHSET bit in CHCR0
Figure amended
Description amended
[1] Set DMAOR, DMARCR, and DMARSRA so that DMABRG
Table amended
Newly added
Clock
Operating
Mode
0
1
2
3
4
6
can be used.
Enable HAC DMA
HACACR.*DMA*EN = 1
Reset HAC and set operating mode
Enable interrupt (if necessary)
before re-specifying the DMAC registers in the case
of DMAC reactivation (DMA transfer will be resumed).
MD2
0
0
0
0
1
1
HAC DMA transmit setting
by setting PFC.IPSELR
Pin Combination
Select HAC module
Codec ready?
MD1
0
0
1
1
0
1
MD0
0
1
0
1
0
0
PLL1
On (×12) On
On (×12) On
On (×6)
On (×12) On
On (×6)
Off (×6)
No
Rev. 2.00 Feb. 12, 2010 Page xiii of lxxxii
PLL2
On
On
Off
CPU
Clock
12
12
6
12
6
1
(vs. Input Clock)
Bus
Clock
3
3/2
2
4
3
1/2
Frequency
Peripheral
Clock
3
3/2
1
2
3/2
1/2
REJ09B0554-0200
FRQCR
Initial Value
H'0E1A
H'0E2C
H'0E13
H'0E13
H'0E0A
H'0808